Senior STA Engineer

Senior STA EngineerResponsibilities:§ Hands on responsibility in top level timing constraints generation/debug on complex GPU/SOCs including configuring different timing modes (Func, DFT, JTAG, MBIST, etc).§ Work with a team of engineers on timing closure and constraints generation/debug.§ Has prior STA & timing closure experience.§ Understanding of...

Mirafra Technologies Hiring STA - PTPX Engineers:1. STA PTPX - Team / Senior / Lead2 .Hands on : Timing closure, STA, Primetime, PTPX.3. Experience : 5 - 8 years4. Location - Bangalore5. NP - 0 to 30 daysSkills - Primetime, Timing closure, Prime power analysis, Power extraction, power estimation, Verdi/ FSDB, PTPXWe are however looking for shorter notice...

Senior Staff Application Engineer.We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software...

Hi,I am excited to announce that #Tessolve is hiring for Experienced #STA Engineers to join our dynamic team in #Bangalore!Expertise in handling timing closure of complex GPU designs, DDR designs with advancedtechnology nodes like 5nm 4nm.● Expertise in Block level Timing Analysis and timing convergence methodologies across cornerswhich includes sanity...

Job Description:At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software...

Must Have Skills/Skill Requirement:Design and architect integration solutions to connect various enterprise applications, systems, and databases.Develop and implement integration workflows, APIs, and data pipelines to enable smooth communication and data exchange between different applications.Utilize Azure Integration Services such as Azure Logic Apps,...

Must Have Skills/Skill Requirement:- Design and architect integration solutions to connect various enterprise applications, systems, and databases.- Develop and implement integration workflows, APIs, and data pipelines to enable smooth communication and data exchange between different applications.- Utilize Azure Integration Services such as Azure Logic...

Must Have Skills/Skill Requirement:Design and architect integration solutions to connect various enterprise applications, systems, and databases.Develop and implement integration workflows, APIs, and data pipelines to enable smooth communication and data exchange between different applications.Utilize Azure Integration Services such as Azure Logic Apps,...

Must Have Skills/Skill Requirement:Design and architect integration solutions to connect various enterprise applications, systems, and databases.Develop and implement integration workflows, APIs, and data pipelines to enable smooth communication and data exchange between different applications.Utilize Azure Integration Services such as Azure Logic Apps,...

- ACL Digital is hiring for PD and STA Engineers for Bangalore and Location.- 3+years of experience in Physical Design.- Must have exp into floorplanning, STA blocks (2 blocks each) from synthesis, PnR, Timing and PV closure.- Notice period- Immediate to 30 days

Hiring for STA Engineer4+ years of experience in STA at IP or SoC level using Primetime- Must be good in scripting, primarily tcl- Good understanding of Hardmacro development cycle and STA collaterals- Experience in DDR IP development, SerDes IP Development and Testchip development is a plus- Must be good in digital design concepts and understanding of...

Hiring for STA Engineer4+ years of experience in STA at IP or SoC level using Primetime- Must be good in scripting, primarily tcl- Good understanding of Hardmacro development cycle and STA collaterals- Experience in DDR IP development, SerDes IP Development and Testchip development is a plus- Must be good in digital design concepts and understanding of...

Senior Lead DFT Engineer – Bangalore, IndiaDescriptionWe are a innovative enterprise that designs, develops, and delivers System-on-Chip products to customers worldwide. The company is focused on AR/VR, imaging, networking, storage, and other dynamic technologies that drive today’s leading-edge applications. We combine world-class expertise, experience,...

Job Title: Senior Design Engineering LeadEstimated Salary: $150,000 - $200,000 per annumAbout the Role:We are seeking a highly experienced Senior Design Engineering Lead to lead our design engineering team in Bengaluru. The successful candidate will have at least 15 years of experience in leading teams of 50+ engineers and managing multiple customer...

Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida ,Chennai and AhmedabadExperience Required: 4+ROLE & RESPONSIBILITIESEngineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida ,Chennai and AhmedabadExperience Required: 4+ROLE & RESPONSIBILITIESEngineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

SoC level – Static timing Analysis EngineerExperience : 10+ years of relevant experienceExpectations:Candidate should have strong STA fundamentals.Has done timing sign-off including timing margin calculations independently on SoC level.Experience in handling STA of multi-power domain designs.STA flow enhancement, abstraction with bottleneck...

So C Level-Static Timing Analysis6+years of relevant experience.Candidate should have strong STA fundamentals.Has done timing sign-off including timing margin calculations independently on So C Level.Experience in handling STA of multi-power domain/designs.STA flow enhancement, abstraction and bottleneck identification.proficient in design margins and SDC...

SoC Level-Static Timing Analysis6+years of relevant experience.Candidate should have strong STA fundamentals.Has done timing sign-off including timing margin calculations independently on SoC Level.Experience in handling STA of multi-power domain/designs.STA flow enhancement, abstraction and bottleneck identification.proficient in design margins and SDC...

Key ResponsibilitiesConducting research and development activities related to Thermal and material characterizationDesign and perform experiments for characterization and testing of materialsUtilize various characterization techniques such as TGA, DSC, STA, DMA and TMAAnalyze and interpret experimental data to draw meaningful conclusionsCollaborate with...