Lead digital design engineer
23 hours ago
# ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. # ;# ;# ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ; : # ; Understanding of computer architecture and concepts. # ; Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. # ; Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis. # ; Understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. # ; Understanding of Power versus Performance versus Area trade-offs in typical CMOS design. # ; Strong knowledge of physical implementation impact on circuit performance. # ; Good understanding of high-performance and low power circuit designs with exposure to Fin Fet technologies, bitcell stability analysis # ; Proven experience as the designated responsible individual for a memory design, leading a small team of designer. # ;# ;# ;# ;# ;# ;# ;# ; # ;# ; # ;# ;# ;# ; # ;# ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;. # ; Circuit Design: Design and develop digital circuits for memory blocks like SRAM, register files, and caches. # ; Simulation and Verification: Perform simulations and verification to ensure functionality and optimize for power, performance, area, timing, and yield. # ; Minimum 7 Yrs of experience in SRAM / memory design Margin, Char and its related quality checks. # ;# ;# ;# ; # ;# ; # ;# ;# ;# ; # ;# ;# ;# ;# ;# ; # ;# ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ; : # ; Some Experience of working on Cadence or Synopsys flows. # ; Experience with Circuit Simulation and Optimization of standard cells. # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;: # ; # ;# ; # ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;: # ;# ; # ;# ; # ;# ; # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;: # ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ;# ; # ;# ;# ;# ;# ;# ;# ;ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
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Lead design engineer
3 weeks ago
Bangalore, India ACL Digital Full timeLead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a...
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Lead Design Engineer
6 days ago
Bangalore, India ACL Digital Full timeLead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a strong...
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Lead Design Engineer
5 days ago
bangalore, India ACL Digital Full timeLead Design EngineerAs an RTL Design Lead, you will play a critical role in leading the RTL design and verification process for complex digital designs. You will manage a team of RTL engineers, collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a strong...
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Lead Design Engineer
5 days ago
bangalore district, India ACL Digital Full timeLead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a strong...
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Lead memory design engineer
3 weeks ago
Bangalore, India ACL Digital Full timeLead Memory Design Engineer Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : Understanding of computer architecture and concepts. Good understanding of SRAM architecture, Critical Path...
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Lead Design Analysis Engineer
6 days ago
Bangalore, India ACL Digital Full time&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding...
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Digital design engineer
2 days ago
Bangalore, India ACL Digital Full timeHi Folks ACL Digital is Hiring!Experience: 4 - 5+ Years Location: Bangalore / Hyderabad Looking: Immediate to 20 days Hiring | RTL Design Engineer Strong experience in RTL Design using Verilog/System Verilog Exposure to complex So C/ASIC design and integration Hands-on with synthesis, Lint, CDC preferred Share resume at Thanks, K Himabindu
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Lead engineer
4 hours ago
Bangalore, India ACL Digital Full timeLead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with cross-functional teams, and ensure the successful implementation of high-performance, low-power designs. The ideal candidate should have a strong...
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Lead memory design engineer
3 weeks ago
Bangalore, India ACL Digital Full timeJob Title: Lead Memory Design Engineer Experience: 6+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / VLSI / Memory IP / So C Job Summary: We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs,...
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Lead design analysis engineer
4 days ago
Bangalore, India ACL Digital Full timeJob Title: Lead Memory Design Engineer Experience: 6+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / VLSI / Memory IP / So C Job Summary: We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and...
