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ASIC Physical Design Engineer
1 month ago
Title: ASIC Physical Design EngineerLocation: India
Your Key Responsibilities Would Include:Perform physical implementation steps including floor planning, place and route, power/clock distribution for congestion analysis and timing closure at block level as well as full chipWork with logic designers to drive feasibility studies and explore design trade-off for physical design closurePerform technical evaluations of vendor, process nodes and IP and provide recommendationsDevelop physical design methodologies and automation scripts for various implementation steps from Synthesis to GDSIIPerform static timing analysis, create timing constraints and validation, critical path analysis, timing closure and timing sign-off
Education & Experience Necessary For Success:
2+ years of experience in ASIC physical design flow and methodologies in 5/7nm and 16nm process nodesHas solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies for deep submicron designExperience with EDA Place & Route tools like ICC2 or Innovus or similar tools and Timing tools like Primetime or similarScripting experience in TCL, python or perlCandidates must have a Bachelor's Degree or higher in Electrical/Electronics and Communication/VLSI/Microelectronics with very good academics..