Senior CPU Integration Design Verification Engineer

1 month ago

Delhi, India Mulya Technologies Full time
Description:About Us:We are at the forefront of the two hottest trends that are revolutionizing the semiconductor industry:

RISC-V

and

Chiplet Architecture,

well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the

Hottest Semiconductor

startups in the industry.

TITLE: Senior CPU Integration Design Verification EngineerLOCATION: Greater Bengaluru AreaWe are seeking an experienced verification engineer to lead verification efforts to integrate complex CPU subsystem IP into complete systems, based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with strong leadership skills.Responsibilities:Lead top-level integration and system verification of CPU subsystems into systems, partnering with CPU and system architecture and design teamsDevelop verification infrastructure in both simulation and emulation environmentsDevelop and execute comprehensive verification plans for system integrationDebug designs in simulation, prototyping platforms, and siliconContinuously drive methodology improvements to improve efficiencyMentor junior engineers to accomplish successful projectsCoordinate between multiple teams

Minimum Qualifications:Bachelors or Masters degree in electrical, computer engineering or related fieldBS+8 years or MS+10

years of industry experience successfully delivering CPU silicon

Skills & Qualifications Required:SystemVerilog verification development experienceTestbench construction using UVM or analogous methodologiesStimulus generation for system functionality and integrationStrong background in one or more common CPU ISAs. x86, ARM, MIPS, RISC-V, etc.Strong background in CPU subsystem functionality such as MP programming and cache coherency and high-performance silicon system architectureSpecific knowledge of AMBA bus standards and UCIe are desiredProject experience throughout the project lifecycleDemonstrated coordination experience with outstanding communication skillsHighly motivated self-starter with strong execution mindset and collaborative approachPost-silicon debug experience strongly preferred

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