Senior DFT Engineer
3 weeks ago
(formerly Infotech Enterprises Limited) is looking for
DFT Engineers
for an ODC based project
Role: Senior/Staff Engineer- DFTLocation: Bangalore/ HyderabadExperience: 4-12 Years
Job DescriptionGood knowledge of all the DFT concepts & ATPG Flows.Block level and Chip level SCAN insertion, DRC, Coverage Analysis and improvements.Stuck-At, Transition Delay fault models test pattern generations and Simulations.Good Experience in Scan Compression, BSCAN /JTAG and MBIST implementation and verification.Good problem solving and debugging skills.Proactive in nature.Experience in writing scripts in perl/tcl for automation.Sound hands on Experience with industry standard DFT tools & flows(Mentor, Synopsys or Cadence )Familiarity with Timing constrains development, LEC & Post Silicon ATE Bring-up will be added advantage.
Required Skills-DFT, Debugging, Coverage Analysis, Logic Circuit Design, Memory Built-In Self Test (MBIST), Scan Insertion, Automatic Test Pattern Generation (ATPG)
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Delhi, India Cyient Full timeGreetings from Cyient LtdCyient (formerly Infotech Enterprises Limited) is looking for DFT Engineers for an ODC based projectRole: Senior/Staff Engineer- DFTLocation: Bangalore/ HyderabadExperience: 4-12 YearsJob DescriptionGood knowledge of all the DFT concepts & ATPG Flows.Block level and Chip level SCAN insertion, DRC, Coverage Analysis and...
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Delhi, India Cyient Full timeGreetings from Cyient LtdCyient (formerly Infotech Enterprises Limited) is looking for DFT Engineers for an ODC based projectRole: Senior/Staff Engineer- DFTLocation: Bangalore/ HyderabadExperience: 4-12 YearsJob DescriptionGood knowledge of all the DFT concepts & ATPG Flows.Block level and Chip level SCAN insertion, DRC, Coverage Analysis and...
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