Senior DFT Design Engineer

4 weeks ago


Delhi, Delhi, India Cyient Full time
Job Description

Greetings from Cyient Ltd

Cyient is seeking a highly skilled Senior DFT Engineer to join our team in Bangalore or Hyderabad. This role involves working on ODC based projects and requires a good understanding of all DFT concepts & ATPG Flows.

Key Responsibilities:

  • Block level and Chip level SCAN insertion, DRC, Coverage Analysis and improvements.
  • Stuck-At, Transition Delay fault models test pattern generations and Simulations.
  • Implementation and verification of Scan Compression, BSCAN /JTAG and MBIST.
  • Proactive problem solving and debugging skills.
  • Experience with industry standard DFT tools & flows (Mentor, Synopsys or Cadence).

Requirements:

  • DFT, Debugging, Coverage Analysis, Logic Circuit Design, Memory Built-In Self Test (MBIST), Scan Insertion, Automatic Test Pattern Generation (ATPG)

About the Role:

We are looking for an experienced Senior DFT Engineer who can work on complex projects and deliver high-quality results. The ideal candidate should have good knowledge of DFT concepts and experience with industry-standard DFT tools and flows.

What We Offer:

  • A competitive salary: ₹1,200,000 - ₹2,400,000 per annum.
  • An opportunity to work on challenging projects and contribute to the growth of the company.
  • A collaborative and dynamic work environment.


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