Senior ASIC Physical Design Engineer
3 hours ago
Company Overview
We are ACL Digital, a leading technology company with a strong focus on innovation and excellence. Our team is passionate about delivering cutting-edge solutions that meet the evolving needs of our customers.
Job Summary
We are seeking an experienced Senior ASIC Physical Design Engineer to join our team as a Timing Closure Expert. This role will be responsible for leading the development and implementation of timing closure methodologies and strategies for our clients' projects.
About the Role
The successful candidate will have a proven track record in ASIC Physical Design, with expertise in timing closure, design constraints, and EDA tool flows. They will work closely with our design teams to develop functional and DFT constraints, integrate IP-level constraints, and optimize clock and data paths.
Responsibilities
- Lead the development and implementation of timing closure methodologies and strategies
- Work with design teams to develop functional and DFT constraints
- Integrate IP-level constraints and optimize clock and data paths
- Develop and maintain scripts for automation and DMSA analysis
- Maintain detailed knowledge of EDA tools and flows, including Tempus and Primetime
Requirements
- Bachelor's degree in Electrical Engineering or Computer Science
- 5+ years of experience in ASIC Physical Design, with a focus on timing closure and design constraints
- Expertise in EDA tool flows, including Tempus and Primetime
- Strong programming skills in Perl and TCL
- Excellent communication and collaboration skills
Estimated Salary
Rupees 12,50,000 - 15,00,000 per annum (based on industry standards and location)
Benefits
We offer a competitive salary package, including benefits such as health insurance, retirement plans, and paid time off. We also provide opportunities for professional growth and development, including training and mentorship programs.
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