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Senior Design Verification Engineer
2 months ago
In the fast-moving world of CPU Verification, Formal Methods are becoming crucial to the success of today's ever-accelerating development cycle.
We are offering the chance to become part of a dedicated team that will deploy Formal on the next generation of CPU designs. This is an opportunity to influence design & verification decisions and shape the future of technology that will fuel billions of devices world-wide.
Responsibilities:
You will apply Formal Methods to CPU Units developed in the Bangalore/Other design centers, with the opportunity to collaborate with our global Formal Teams. The role entails investigating, creating, developing and deploying new Formal Verification techniques on live projects. You will use the industry’s best available tools and be in close contact with EDA tool vendors. You will work alongside formal experts to plan and implement Formal Verification to exceptional quality and will deliver to milestones for the CPU IPs.
Required Skills and Experience :
5+ years of experience in formal verification of digital hardware design
Familiarity with formal methods (e.g. SVA, PSL, model checking, theorem proving)
Awareness of Formal practices/apps/tools for functionally safe IPs suited for Automotive products is a plus.
An engineering mind-set and passion for digital design
Familiarity with industry-standard formal verification tools
Knowledge of hardware description and verification languages, such as VHDL, Verilog/ SystemVerilog, PSL
A keen interest in processors and digital systems
Strong reasoning skills and excellent attention to detail
Ability to understand and map abstract formal concepts onto designs
Creativity and ability to communicate ideas effectively
Good inter-personal and teamwork skills
Nice To Have” Skills and Experience :
Understanding of the end-to-end verification processes, from test plan creation through to verification closure
Experience in scripting languages, e.g. Python/Perl/TCL/shell programming
Familiarity with model-checking techniques
Exposure to invariants and abstractions
Understanding of assume-guarantee reasoning
Interested candidates kindly reach out on
References are welcomed.
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