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Senior Engineer, Digital Verification Engineer

3 months ago

Bengaluru, India Analog Devices Full time
Analog Devices is seeking

Senior digital design verification Engineer

, who will be responsible for design verification of highly integrated solutions and products in a multifunctional team. You will be working on driving real revenue growth on the next generation of Intelligence at the Edge products across multiple products and business units.About ADI:Analog Devices, Inc. is a leading global high-performance analog technology company dedicated to solving our customers' most complex engineering challenges. We play a critical role at the intersection of the physical and digital world by providing the building blocks to sense, measure, interpret, connect, and power devices and systems. We design, manufacture, test, and market a broad portfolio of solutions, including integrated circuits (ICs), software and subsystems that leverage high-performance analog, mixed-signal and digital signal processing technologies. We embrace a culture of innovation and collaboration to push the state of the art.About the RoleKey member of design verification team responsible for SOC or subsystem design pre silicon verification. The candidate will be responsible for formulating verification strategies, Define verification architecture, Flow, Methodology and leading, driving and completing verification of large integrated products. As a senior team member, it is expected that he/she will lead and influence verification methodologies within both DBU and ADI. The candidate is also encouraged to participate in cross company technical initiatives as well as patent and publish work where possible.Responsibilitieso End to End verification ownership of IP or Subsystem or SOC levelo Verification of complex microprocessor designs, neural nets and high-speed peripherals using leading edge verification methodologies.o UVM testbench architecture development and implementation of DV flows, methodologyo Defining testplans, tests and verification methodology for block / subsystem and chip-level verification. Working with the design team in generating and reviewing testplans and closure of code and functional coverageo Working with other verification team disciplines like emulation, FPGA, SystemC and Firmware teams to determine correct functionality.o Formal verification of IP’s and Subsystemso Performance verification and Performance analysis of complex SOCs end to end scenarioso System level use case scenarios definition, coding and verificationo Innovating verification solutions to hit deliverable schedules.o The chance to be exposed to and learn state of the art verification techniques such as formal, emulation, portable stimulus and virtual platforms.o Come up with verification strategy for a product after going through product requirements and design specifications.Requirementso B.Tech/M.Tech with 5+ years of industry experience in Digital Pre Silicon verification.o Good understanding of SOC/Subsystem design concepts and design architectures.o Hands on experience in developing, updating and debugging of Verilog, SV-UVM , SOC level testbenches is a must.o Experience in closing the verification of block, subsystem level verification using industry standard metrics like code and functional coverage is a must.o Test Bench, TB, environment, architect and implement verification flow and methodologyo Experience in Power aware verification and Formal verification is an added advantageo Gate level Simulation with timing annotatedo Strong knowledge of test-plan generation, coverage analysis transaction level modeling, pseudo and constrained random techniques with System Verilogo In-depth knowledge of SV-UVM and debugging of testbenches is a must.o Knowledge of microprocessor cores such as ARM, RISC-V, Tensilica , Neural Network, GPU Cores is a plus.o System Verilog, C/C++, System C, TCL/Python/shell-scriptingo Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe.o Quick to adopt new technologies with good problem-solving skills.Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days