SENIOR LOGIC DESIGN ENGINEER – SMP Interrupt Controller

2 months ago


Bengaluru, India Mulya Technologies Full time
SENIOR LOGIC DESIGN ENGINEER – SMP Interrupt ControllerFortune 100 OrganizationLocation: BangaloreSENIOR LOGIC DESIGN ENGINEER – SMP Interrupt ControllerYour Role and ResponsibilitiesLead the architecture, design and development of an Interrupt Controller for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor)Develop the features, present the proposed architecture in the High level design discussions to hardware and software teamsDevelop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the featureSignoff the Pre-silicon Design that meets all the functional, area and timing goalsParticipate in silicon bring-up and validation of the hardwareLead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums.Estimate the overall effort to develop the featureEstimate the silicon area required for the feature

Required Technical and Professional Expertise8 to 15 years of relevant experienceAt least 1 generation of processor interconnect design delivery leadership (eg UPI, axi, amba, NoC).Expertise of SMP coherencyExperience in different on-chip interconnect topologies (e.g., mesh, crossbar)Understanding of various snoop and data network protocolsUnderstanding of latency & bandwidth requirements and effective means of implementationWorking knowledge of queuing theory numa/nuca architectureProficient in HDLs- VHDL / VerilogExperience in High speed and Power efficient logic designExperience in working with verification, validation, physical design teams for design closure including test plan reviews and verification coverageGood understanding of Physical Design and able to collaborate with physical design team for floor planning, wire layer usage and budgets, placement of blocks for achieving high-performance designExperience in leading uarch, RTL design teams for feature enhancements.Follow agile project leadership principles. Work with the team on estimation and execution plan.Ability to quickly understand issues spanning multiple functional domains, switch context frequently and provide solutions to problems, is necessary.Requirements : Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.Preferred Technical and Professional ExperienceNonePreferred EducationMaster's Degree

Contact:UdayMulya "Mining The Knowledge Community"



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