Memory Layout Engineer

Job Location: Bangalore Notice Period: Immediate or 15 days Exp:3+ years Responsible for Memory Compiler layout development and verification. · Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM. · Perform layout verification like LVS/ DRC/ Latchup,...

Job Location: Bangalore Notice Period: Immediate or 15 days Exp:3+ years Responsible for Memory Compiler layout development and verification. · Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM. · Perform layout verification like LVS/ DRC/ Latchup,...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification. · Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM. · Perform layout verification like LVS/ DRC/ Latchup, quality...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification. · Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM. · Perform layout verification like LVS/ DRC/ Latchup, quality...

Memory Layout Experience: 4 to 6 yearsSkills required:Hands-on Experience in top level memory Layout.Technode experience from 28nm -3nmExperience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification ToolPerforming various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts.Knowledge of...

Memory Layout Experience: 4 to 6 years Skills required:Hands-on Experience in top level memory Layout.Technode experience from 28nm -3nmExperience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification ToolPerforming various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts.Knowledge of...

# 1. Memory layout - Sr. Engineer / LeadBengaluru, IndiaExperience: 4-8 YrsSkills required:•Hands-on Experience in top level memory Layout.•Technode experience from 28nm -3nm•Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool•Performing various kinds of layouts, implementations from top-level, floor planning...

Hi ,We are hiring Layout Engineers for different streams as follows. Kindly share your CV to rajkumar.p@samsung.comSRAM Memory Layout JD::· Must have 3 to 7 years of experience in SRAM Memory Layout / standard cell layout designs in advanced CMOS process.· Should have expertise in multiple standard cell layout library developments.· Should be able to...

# 1. Memory layout - Sr. Engineer / LeadBengaluru, IndiaExperience: 4-8 YrsSkills required:•Hands-on Experience in top level memory Layout.•Technode experience from 28nm -3nm•Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool•Performing various kinds of layouts, implementations from top-level, floor planning...

# 1. Memory layout - Sr. Engineer / LeadBengaluru, IndiaExperience: 4-8 YrsSkills required:•      Hands-on Experience in top level memory Layout.•      Technode experience from 28nm -3nm•      Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool•      Performing various kinds of layouts,...

**Title**:Intern - Memory Design **About GlobalFoundries** **Introduction** Bangalore GlobalFoundries (GF) Bangalore is seeking a highly skilled and motivated semiconductor development engineer for an internship position. The student will work for embedded memory development in GF Bangalore **Your Job** - Circuit Design and...

Analog Devices Foundation IP group is seeking an experiencedSenior Circuit Design Engineer to develop logic IPs (standard cells and memories) to support analog, digital and mixed-signal SOC designs at various technology nodes. Responsibilities would include, but are not limited to: Support internal and external memory compilers. Memory instance view...

Description and Requirements This role is for a PCB Layout engineer in the Lenovo Datacenter Product Group (DCG), based out of Bangalore, Karnataka. This role is core to the Server Development organization in providing the end-to-end design and deliver innovative server designs across DCG. In this role, you will be working with Hardware Engineers,...

**Company**: Qualcomm India Private Limited **Job Area**: Engineering Services Group, Engineering Services Group > Layout Engineer **General Summary**: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout...

Position: Senior Memory Design EngineerLocation: Bangalore / NoidaResponsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.Required Skills and Experience :- Understanding of computer architecture and concepts.- Basic understanding of CMOS...

Position: Senior Memory Design EngineerLocation: Bangalore / NoidaResponsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.Required Skills and Experience :Understanding of computer architecture and concepts.Basic understanding of CMOS...

Position: Senior Memory Design EngineerLocation: Bangalore / NoidaResponsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.Required Skills and Experience :Understanding of computer architecture and concepts.Basic understanding of CMOS...

**Title**:Intern - Layout **About GlobalFoundries** **Introduction** **Your **Job** - Work closely with the design team to provide high quality layout in a timely manner - Work on block level, macro level and top level; floor planning, assembly and verification **Required Qualifications**: - Requires a Bachelor of Engineering B.E./B.Tech or equivalent...

Memory Characterization Engineer (1 8 years)Skills: C,PerlJob Locations: Bangalore/BangaluruTotal vacancies: 6Should have Strong fundamentals in Memory, Processor and System Architecture Should be well versed in System Level Debugging Silicon Bring Up Should have expertise in C and Perl Should have Strong Communication skills

We are now looking for a CAD Layout Design Engineer!NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a...