Design Verification Engineer

Verification Engineering OpportunityWe are seeking an experienced Verification Engineer to join our team.About the Role:Collaborate with designers, architects, and verification teams to verify the design, architecture, and micro-architecture of Application-Specific Integrated Circuits (ASICs).Develop verification infrastructure, define verification scope,...

-We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our SoC/ASIC verification team in Bangalore. The ideal candidate will have a deep understanding of the verification lifecycle, from test planning to coverage closure, and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level...

Position Overview:We are seeking a highly skilled Senior Engineer/Architect to join our dynamic team. In this pivotal role, you will lead the design and verification of advanced integrated circuits (ICs), ensuring they meet the highest standards of quality and performance. This position offers the opportunity to work on groundbreaking projects and influence...

Design Verification Engineer - Senior / Lead / Sr. LeadJob Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification, Emulation Good in...

Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies.Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently handling...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently...