Formal Verification Engineer
2 months ago
Key Responsibilities:
• Develop and execute formal verification plans, including test plans and assertion-based verification strategies for digital designs.
• Apply formal methods (model checking, equivalence checking, etc.) to verify complex blocks of RTL designs.
• Collaborate with design and verification teams to ensure full coverage of all design features and specifications.
• Work on verification sign-off, ensuring functional correctness, and documenting the verification closure.
• Automate verification flows using scripting languages like Python, Perl, or Shell.
Required Qualifications:
• Bachelor's or Master’s degree in Electrical/Electronics Engineering
• 4+ years of experience in formal verification of digital designs.
• Hands-on experience with formal verification tools such as JasperGold, Questa Formal, Synopsys VC Formal, or Cadence IFV.
• Strong understanding of RTL design and verification methodologies (e.g., UVM, OVM).
• Good debugging skills and the ability to identify design and verification bottlenecks.
• Experience with scripting languages (Python, Perl, Shell) to automate formal verification flows.
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Formal Verification Engineer
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Bengaluru, India Tech Mahindra Full timeKey Responsibilities:• Develop and execute formal verification plans, including test plans and assertion-based verification strategies for digital designs.• Apply formal methods (model checking, equivalence checking, etc.) to verify complex blocks of RTL designs.• Collaborate with design and verification teams to ensure full coverage of all design...
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Formal Verification Engineer
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Bengaluru, India Tech Mahindra Full timeKey Responsibilities: • Develop and execute formal verification plans, including test plans and assertion-based verification strategies for digital designs. • Apply formal methods (model checking, equivalence checking, etc.) to verify complex blocks of RTL designs. • Collaborate with design and verification teams to ensure full coverage of all design...
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