Formal Verification Expert
3 weeks ago
Job Requirements
We are seeking a highly skilled Formal Verification Engineer to join our team at metavlsi. The ideal candidate will have a strong background in formal verification techniques and a deep understanding of digital logic design and verification.
Key Responsibilities:
- Minimum 2+ years of experience in formal verification is required.
- Advanced knowledge of SoC/CPU/GPU/Cellular designs, VLSI, and digital logic design and verification techniques.
- Developed formal property proofs on industrial strength designs and architectures.
- Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms.
- Confirmed understanding of formal verification technologies/abstraction techniques.
- Knowledge and experience in interpreting hardware specifications and using temporal logic assertion-based languages such as SVA or PSL.
- Experience in using EDA formal tools and tool development experience is a plus.
- Proficiency in any scripting language with excellent debugging skills.
- Extraordinary teammate with excellent interpersonal skills.
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