Lead DFT

Design for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary:We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...

Design for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary: We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...

Lead Soc is hiring DFT Leaders!Hands on experience working in DFT with scan insertion. Good communication and analytical skills and Team handling. Experience: 9 years to 20 years Location: BangalorePlease share your profile to jhansi.bv@leadsoc.com for further discussion

Open position:- Lead DFT Engineer Experience: - 7+ years Location:- Bangalore NP: - Immediate to 15 days JD: - 1. Experience with DFT tools such as Synopsys DFT Compiler, Test Kompress and Xelium. 2. Minimum 7+ years of experience in DFT engineering, with a focus on Scan Insertion and ATPG, ICL, SSN 3. Strong knowledge of DFT techniques such as Scan Chains,...

We are hiring for DFT Engineers. Experience- 5+ years Location-Bangalore, Ahmedabad, Hyderabad, NoidaEducational Qualification(s) BE/ME *Detailed Description of the Job Profile • Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP tests and Pattern Validation w/wo Timing, DFT mode timing analysis...

DFT Lead :Work Location - Bangalore Experience - 7+ YearsDesired Skills and Experience –· 7+ years of experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan.· DFT logic integration and verification.· Experience in debugging low coverage and DRC fixes· Gate Level ATPG simulation with and without timing.· Pattern generation,...

Key skills with hand on: DFT, MBIST, Scan Insertion, ATPG, Full Chip ,SOC ,VLSI Experience:5 - 25 years Work Location:Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education:Engineering (excluding Mechanical/Civil)Detailed JD: 5+ years' experience in ASIC/DFT - simulation and Silicon validation, •Should have worked in at least one Full chip DFT...

Job Title: Lead DFT EngineerExperience: 7+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / ASIC / SoC DesignJob Summary:We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with...

Job Title: Lead DFT EngineerExperience: 7+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / ASIC / SoC DesignJob Summary:We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with...

Job Title: Lead DFT EngineerExperience: 7+ YearsLocation: BangaloreEmployment Type: Full-timeIndustry: Semiconductors / ASIC / SoC DesignJob Summary:We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with...