Sr.Design Verification Engineer

4 days ago


New Delhi, India Tessolve Full time

Job Title:IP/SOC Verification Engineer Experience:5+ Years Location:Bengaluru / Hyderabad Company:Tessolve Semiconductor Notice Period:Immediate to 30 Days Employment Type:Full-time / Permanent About Tessolve Tessolve Semiconductor, part of the Hero Group, is a leading engineering services company offering end-to-end silicon and system design solutions. Tessolve provides expertise across ASIC design, verification, post-silicon validation, and embedded software development — enabling customers to accelerate product development from concept to production. Job Summary Tessolve is looking for an experiencedIP/SOC Verification Engineerwith strong hands-on experience inSystemVerilog/UVM-based functional verification . The candidate will contribute to verification planning, testbench development, simulation, and debug activities for complex IP and SoC designs. Key Responsibilities Develop and maintainUVM/SystemVerilog testbenchesfor IP and SOC-level verification. Defineverification plans , test strategies, and coverage goals. Implementconstrained-random, directed, and assertion-based tests . Integrate multiple IPs at SOC level and verify system functionality. Analyze simulation failures, debug issues, and work closely with design teams for root cause analysis. Ensurefunctional and code coverage closureand regression automation. Participate indesign/verification reviewsand contribute to methodology improvements. Required Skills and Qualifications B.E/B.Tech/M.E/M.Techin Electronics, Electrical, or Computer Engineering. 5+ yearsof hands-on experience inIP/SOC functional verification . Strong experience inSystemVerilog, UVM methodology , and verification environments. In-depth understanding ofSoC architecture, bus protocols(AXI, AHB, APB, PCIe, DDR, USB, etc.). Proficiency in simulation tools likeVCS, Questa, or Xcelium , and debug tools likeVerdi or DVE . Experience withcoverage-driven verification , regressions, and scripting (Python/Perl/TCL). Strong analytical and problem-solving skills with excellent teamwork and communication abilities. Good to Have Exposure tolow-power verification (UPF/CPF) ,DFT , orformal verification . Experience withSoC integration, emulation, or FPGA prototyping . Familiarity withversion control systems(Git/Perforce) and CI flows. Why Tessolve Work oncutting-edge SoC and IP verification projectswith leading semiconductor clients. Opportunity to be part ofend-to-end silicon developmentlifecycle. Dynamic work environment fosteringtechnical excellence and learning . Application Details Notice Period:Immediate joiners preferred (0–30 days). Job Locations:Bengaluru / Hyderabad. To Apply:manjula.patil@tessolve.com


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