DFT Engineer

1 day ago


New Delhi, India Best NanoTech Full time

Job Title:DFT Engineer Location:Delhi NCR / Bangalore Experience:3–10 Years Notice Period:Immediate to 15 DaysAbout the Role We are hiring an experiencedDFT Engineerresponsible for the complete design-for-test implementation and verification cycle for complex SoCs. The ideal candidate should have full-cycle experience across scan insertion, ATPG, LBIST, JTAG, and post-silicon debug, with strong exposure to industry-standard DFT tools and methodologies. Key Responsibilities End-to-endDFT implementation and verificationfor SoCs. Development and integration ofscan architecture, boundary scan, JTAG, MBIST, ATPG and LBIST . Hands-on execution ofscan insertion, ATPG DRC and coverage analysis . Run and debug simulation failures includingtiming/SDF-based validation . Supportpost-silicon debug, bring-up, and issue root-cause analysis . Collaborate with RTL, Physical Design, and Validation teams to ensure high-quality DFT closure. Required Skills & Expertise ✔ 3–10 years of experience in DFT engineering ✔ Proven experience working onmultiple SoCs end-to-end ✔ Strong hands-on experience in: Scan insertion JTAG, LBIST, MBIST ATPG pattern generation & validation ✔ Expertise inMentor Graphics DFT toolchainand familiarity withSynopsys scan insertion and timing analysis tools ✔ Strong understanding ofVerilog/VHDL RTL coding , automation, and linting flows ✔ Ability to debug simulation and silicon issues efficiently Preferred Attributes Strong attention to detail, proactive mindset, and ownership-driven work ethic Excellent verbal and written communication skills Passion for continuous learning, problem-solving, and cross-team collaboration Education BE / B.Tech / ME / M.Techin Electronics, Electrical, VLSI, or related engineering discipline from a reputed institution.Regards Anil Sheoran anil@bestnanotech.in 9813621334


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