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RTL Design Lead

4 weeks ago

Hyderabad, Telangana, India BITSILICA Full time

Job Summary:

We are looking for a highly experienced RTL Design Lead to drive the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. The ideal candidate should have a solid background in RTL design using Verilog/SystemVerilog, along with experience in leading teams and interfacing with verification, DFT, and physical design teams.

Key Responsibilities:

  • Lead RTL design activities for complex IPs or SoC sub-systems.
  • Work closely with architects to translate high-level specifications into micro-architecture and RTL.
  • Drive design reviews, coding standards, and technical quality.
  • Define and implement RTL design methodologies and flows.
  • Collaborate with verification, DFT, synthesis, and backend teams to ensure successful integration and tapeout.
  • Guide and mentor junior designers in the team.
  • Support silicon bring-up and debug as needed.

Required Skills:

  • Proven track record of delivering IP or SoC designs from spec to GDSII.
  • Experience in micro-architecture development, pipelining, and clock-domain crossing.
  • Good understanding of ASIC design flow, including synthesis, STA, and linting.
  • Hands-on experience with AMBA protocols (AXI/APB/AHB) and other standard interfaces.
  • Strong debugging and problem-solving skills.
  • Familiarity with low-power design techniques is a plus.

Preferred Skills:

  • Exposure to high-speed protocols (PCIe, USB, Ethernet, etc.).
  • Familiarity with scripting languages (Python, Perl, TCL) to automate design tasks.
  • Experience with tools like Synopsys DC, Spyglass, Verdi, VCS, etc.
  • Prior experience in leading and mentoring a small team.

Educational Qualification:

  • Bachelor's or Master's degree in Electronics/Electrical Engineering or related field.