Senior DFT Engineer

Hi All, Greetings from Eximietas... Position: Senior DFT Engineers/Leads/Architects. Location: Bengaluru or Visakhapatnam. Mode of Work: On-site. Exp: 5 to 15 Years. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies,...

Job Opportunity: DFT EngineerMust have 5-15 years of experience in SoC/ASIC Digital Design with a focus on Design for Test (DFT)Key Responsibilities include:Working independently to finish DFT tasksCollaborating with stakeholders across cross-functional teamsQualifications and Requirements:Bachelor's degree in Computer Science, Electrical/Electronics...

Job DescriptionAs a senior engineer in the ASIC/DFT field, you will be responsible for ensuring DFT design rules and coverages are met. You will generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.Key responsibilities include:Interface with ASIC design...

Job Description:Our team is looking for a seasoned DFT engineer to lead the integration of cutting-edge DFT solutions. As a key member of our team, you will be responsible for designing and implementing innovative DFT architectures that meet our clients' complex requirements.We are seeking an expert with extensive experience in working with DFT RTL sides,...

Job Title: Software Design Engineer in TestKey Responsibilities and AccountabilitiesWe are seeking a highly motivated and skilled DFT engineer to join our team. The successful candidate will be responsible for designing and implementing DFT architecture for complex SoCs.The ideal candidate should have strong expertise in DFT architectures and methodologies,...

STA EngineerWe are seeking a skilled STA engineer to join our backend implementation team.The successful candidate will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, focusing on performance, power, and area (PPA) optimization and signoff closure.Key Responsibilities:Timing Closure Expertise: Strong foundation in...

Hello All, Eximietas Design Hiring STA Engineers/Leads Experience: 7+ Years Bengaluru or Visakhapatnam Job Description: Experience in Static Timing Analysis (STA) for ASIC designs. Experience in developing timing constraints. Experience in timing closure and optimization. Proficiency in using scripting languages such as Perl and TCL. Familiarity with...

Hello All,Eximietas Design Hiring STA Engineers/LeadsExperience: 7+ YearsBengaluru or VisakhapatnamJob Description:Experience in Static Timing Analysis (STA) for ASIC designs.Experience in developing timing constraints.Experience in timing closure and optimization.Proficiency in using scripting languages such as Perl and TCL.Familiarity with EDA tools such...

Hello All,Eximietas Design Hiring STA Engineers/LeadsExperience: 7+ YearsBengaluru or VisakhapatnamJob Description:Experience in Static Timing Analysis (STA) for ASIC designs.Experience in developing timing constraints.Experience in timing closure and optimization.Proficiency in using scripting languages such as Perl and TCL.Familiarity with EDA tools such...

Senior STA EngineerWe are seeking an experienced Senior STA Engineer to assume key responsibilities in our organization.Develop and Implement STA Solutions: Design and develop Static Timing Analysis (STA) solutions for ASIC designs, driving optimal timing closure through effective problem-solving.Timing Constraints and Automation: Utilize scripting languages...