EMIR Lead Engineer

Role Overview:We are seeking a highly experiencedEMIR Lead Engineerto drivepower integrity, IR drop, and electromigration analysisfor advanced SoC designs. The ideal candidate will have strong expertise inEMIR sign-off methodology,PDN planning, andchip-package co-design, along with the ability to lead and mentor a team of engineers.Key Responsibilities:Lead ...

Job Description: EMIR Engineer (Electromigration & IR Drop) – VLSIRole OverviewThe EMIR Engineer is responsible for analyzing and ensuring the reliability of integrated circuits by performing Electromigration (EM), IR Drop, and Power Integrity analysis during physical design and sign-off stages. The role involves working closely with physical design,...

Company DescriptionSilicon Patterns is a leading engineering services company specializing in pre-silicon and post-silicon design, verification, and validation. With headquarters in Hyderabad and offices in Bangalore and Raipur, as well as skilled engineering teams in Malaysia, we deliver end-to-end semiconductor and embedded system solutions to global...

Join our team as aBusiness Analystto provide consulting support on non-financial regulatory reporting projects, including EMIR, for a leading financial client.You will work closely with various teams to ensure project governance, root cause analysis, solution design, and user acceptance testing are effectively managed. Apply now to contribute your expertise...

LTTS is hiring for Physical Design Lead with 7+ years of experience on below JD ::JD for PnR – 7+ ’ experience • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV. • Knowledge of industry stanrd E...

Hello Folks, we at LTTS are looking for Physical design Lead role with 8+ years of experience. Deatiled JD is below as mentionedCandidates with PnR – 8+ ’ experience • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV,...

L&T Technology Services is looking to hire for Lead Role Physical Design Engineers. Experience required : 7-10 Years Job Location: Bangalore Detailed job description is below ::JD for PnR – 7+ ’ experience • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing,...

L&T Technologies (LTTS) is looking for Physical Design Engineers (PnR)with 4.5+ Years of experience.Job Location : Bangalore Please find the detailed job description below :: • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like...

KEY RESPONSIBLITIES: * Drive full chip IR/EM convergence on multiple ASICs across different technology nodes. * Work closely with architecture, power management, package and floorplan team to come up with robust power delivery design. * Work with RTL and PD team in coming up with the low power and UPF specification for the SoC. * Work closely with CAD team...

About Us:Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing...