Cloudverks - Design Verification Engineer - UVM/ASIC

3 weeks ago


HyderabadTelangana, Telangana, India TECHCLOUDVERKS IT SOLUTIONS PRIVATE LIMITED Full time

Job Description:


- B.Tech/M.Tech in Electronics & Communication Engg.


- Experience - Minimum 5+ years


- Experience with complex ASIC projects, with demonstrated mastery of successful verification from test planning till tapeout


- Strong background in System Verilog and UVM methodologies and UVCs


- Proficient in OO programming, computer architecture and data structures


- Extensive experience with UVM test bench construction


- Experience with AMS design verification is a plus


- Experience with process and methodology improvements to enhance verification quality and productivity


- Development of reusable code used over multiple product generations


- Past experience with Ethernet, SERDES, MAC, PCS, SPI protocols & VIPs.


- Knowledge of Python, Makefiles


Role Responsibilities:


- Own the functional verification of a state-of-the-art mixed signal Sensor ASIC


- Partner with team members, designers and architects to understand and verify the functionality within the context of the block, chip and overall system


- Document and execute test plans consisting of directed and constrained-random tests


- Develop functional coverage and use feedback from code and functional coverage to enhance verification efforts


- Provide technical guidance and innovative ideas to improve quality, processes and productivity

(ref:hirist.tech)

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