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IP Verification Engineer
7 days ago
Job Description:
Roles & Responsibilities:
- To be part of a highly skilled ASIC Team working on cutting-edge technology nodes
- Responsible for overall IP/Block and sub-system verification including test plan creation, SystemVerilog/UVM testbench development, and signoff
- Ensure successful product verification through multi-dimensional verification coverage, including mixed mode verification
- Mentor and guide junior team members
- Collaborate with domain specialists from different locations on key technical projects SKILLS required:
- Expertise in IP/Block/Subsystem level verification and familiarity with AMBA protocols-APB/AHB/AXI
- Track record of developing test plans, UVM Environments, and test benches
- Proficiency in RTL debugging, scoreboard, assertions, functional coverage coding, and code coverage analysis
- Solid understanding of Verilog and System Verilog languages
- Strong written & verbal communication skills, along with a dedicated approach to teamwork within cross-functional and globally dispersed teams
Educational Qualification:
- M.S./M.Tech, BS/BE (Electronics)
Years Mandatory Skills:
- Working experience with AXI/AHB protocols
- Experience in IP/Block/Subsystem Verification from verification plan to IP sign off
- Expertise in System Verilog and UVM methodology
Domain:
- IP/Block/Subsystem Verification (RTL Front end verification)
Location:
Hyderabad
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