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Senior Design Verification Engineer

3 months ago

Hyderabad, Telangana, India BITSILICA Full time

Skill: Senior DV Engineer

Exp: 5+ Years

Location: Hyderabad, Bangalore, Chennai

Immediate - 30 Days

JD:

ASIC Verification Engineer

Job Description:

Verification Engineer position is your opportunity to join one of the industry's leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.

Responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows.

Qualifications

· 5+ years of experience in UVM verification and UVM environment development

(must have)

  • Proficient in test plan definition and testcase development in C/Assembly/System Verilog
  • Expertise in verifying design at RTL level and gate-level simulation
  • Good understanding of coverage analysis, performance verification and use-case verification.
  • Must have worked on AMBA AXI, AHB, APB protocols
  • Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.
  • Experience in functional test vector development and post-silicon bring-up/debug.
  • Fluency with scripting languages (e.g., Perl, Python, Shell); and
  • Experience in working with repository management tools like Bitbucket/ Jenkins and bug tracking tools like JIRA.