FPGA Design Engineer

1 week ago

Hyderabad Telangana India, Telangana People Prime Worldwide Full time

Job Title: FPGA Design Engineer

Location: Pan India

Experience: 5–15 Years

Employment Type: Permanent

Notice Period: Immediate – 20 Days

CTC: Up to 34 (Max)


About the Company

Our client is a leading technology-driven organization delivering cutting-edge solutions across semiconductor, telecom, and embedded systems domains. They work on next-generation hardware platforms, enabling innovation in high-speed, high-reliability FPGA-based designs. The company follows industry best practices, Agile methodologies, and provides opportunities to work on complex, real-world engineering challenges.


Job Description

  • Design, develop, and validate FPGA-based solutions for high-performance systems
  • Work on complete FPGA design flow including RTL coding, synthesis, place & route, and timing closure
  • Develop and review RTL using Verilog/SystemVerilog
  • Perform RTL quality checks including Lint, CDC, and RDC analysis
  • Define and validate timing constraints and perform STA
  • Debug FPGA designs using inbuilt logic analyzers (ILA/SignalTap, etc.)
  • Collaborate with cross-functional teams including validation, firmware, and system teams
  • Review design documents and support FPGA validation activities
  • Follow Agile development methodologies and version control practices


Mandatory Skills

✔ Strong understanding of FPGA design flow

✔ Hands-on experience in RTL coding (Verilog/SystemVerilog)

✔ Knowledge of CDC, STA, timing constraints

✔ FPGA debug experience using inbuilt logic analyzers

✔ Solid logic design and high-speed design knowledge

✔ Working knowledge of FPGA device architecture & clock structures

✔ Experience with synthesis, Place & Route, and STA

✔ Familiarity with bus protocols: AXI / AHB / APB / AvMM

✔ Knowledge of slow-speed protocols: I2C, SPI, UART, MDIO

✔ Experience with FPGA tools – Lattice Radiant (Mandatory); Intel, Xilinx/AMD (Good to have)

✔ Basic scripting knowledge (Make, Perl, Shell, Python)

✔ Experience with Git and Agile methodology


Good to Have / Added Advantages

➕ Exposure to Telecommunication domain (5G, Radio Subsystems, AMS, etc.)

➕ Knowledge of PCIe, Ethernet IPs

➕ Experience in error detection and correction techniques

➕ Basic understanding of Zynq design flow

➕ Experience working in Agile/Scrum teams


Important Note (Please Read Before Applying)

Do NOT apply if:

  • You have less than 3 years or more than 6 years of FPGA design experience
  • You do not have hands-on RTL & FPGA design flow experience
  • Your notice period exceeds 20 days
  • Your background is unrelated to FPGA / RTL / Hardware design

✅ Apply ONLY if you meet all mandatory skills and experience criteria.

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