IP Development Engineer – FPGA

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

MTS SILICON DESIGN ENGINEER  

THE ROLE: 

The focus of this role is to plan, build, and execute the end-to-end processing system solution

THE PERSON:  

Looking for highly motivated and self-driven engineer

KEY RESPONSIBILITIES:  

• Will be responsible for planning and execution of end-to-end processing system solution including Vivado IP configuration to software execution targeting customer usecases on AMD Xilinx products
• Collaborate with marketing, architects, hardware engineers, pre/post silicon verification and firmware engineers to define specification and implementation of processing system solution requirements with agreed scope and timelines
• Work closely with your team and cross site stakeholders to drive the requirements and deliverables
• Interact with multiple teams across AMD to develop processing IP solution targeting AMD AECG FPGA/SoC/ACAP solution, including bare metal and OS hosted environments

PREFERRED EXPERIENCE:  

• Self-driven, motivated, focused, results oriented individual with superior academic achievements
• Excellent communication skill for working remotely with global team
• Proficient knowledge of Verilog/system verilog coding, and simulation (Xilinx simulator, ModelSim, NC-Verilog, VCS etc.)
• Understanding FPGA basics, FPGA tools flow, using AMD Xilinx/AECG FPGAs, FPGA timing constraints, STA and timing closure
• Knowledge of system-level architecture including buses like AXI, bridges, memory controllers , High Speed serial connectivity, PCIe, Ethernet etc is a plus.
• Good understanding of processing system, boot and IO peripherals is preferable
• Good organizational skills with ability to multi-task, prioritize, and track many activities.
• Very good collaboration skills to interface with architecture, design and validation teams.
• Expertise in debugging systems on boards using debugger/scopes
• Ability to drive hardware/software solution projects at all stages from planning to implementation
• Familiar with Xilinx SDX tools to create software application is a plus
• Programming languages familiarity is a plus: C, Assembly, embedded applications programming
• Scripting: very good knowledge in Tcl/Python/PERL/C-Shell
• Very good team player

ACADEMIC CREDENTIALS:  

• • M.S/M.Tech/B.E/B.S/B.Tech in EE/ECE/CSE with at least 6+ years of experience in IP/Sub-system/System development and validation

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.