RTL Design Engineer

2 weeks ago

Hyderabad, India ACL Digital Full time

Job Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog . Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams. Requires strong fundamentals in digital design , timing closure, and understanding of the ASIC flow. You'll debug simulation failures, implement ECOs, and support gate-level simulations. Collaborate with cross-functional teams (SW, DV, Physical Design) to achieve tapeout goals. Bachelor's or Master's degree in engineering in EE/CS is essential, along with 2-3 years of relevant experience. Share resumes to

  • Senior ASIC RTL Designer

    2 weeks ago

    hyderabad, India Eximietas Design Full time

    Position: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

  • Senior ASIC RTL Designer

    1 week ago

    hyderabad, India Eximietas Design Full time

    Position: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

  • Senior ASIC RTL Designer

    1 week ago

    Hyderabad, India Eximietas Design Full time

    Position: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

  • Senior ASIC RTL Designer

    2 weeks ago

    Hyderabad, Telangana, India Eximietas Design Full time ₹ 20,00,000 - ₹ 25,00,000 per year

    Position: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

  • RTL Design Engineer

    3 weeks ago

    Hyderabad, India Proxelera Full time

    We’re hiring an RTL Design Lead who can own front-end SoC architecture, guide technical direction, and drive RTL execution from spec to handoff. You’ll lead micro-architecture definition, ensure clean and efficient RTL, and collaborate across DV, PD, DFT, and architecture teams to deliver high-quality silicon. Job Description: Lead RTL design and...

  • RTL Design Engineer

    2 weeks ago

    Hyderabad, India Proxelera Full time

    We’re hiring an RTL Design Lead who can own front-end SoC architecture, guide technical direction, and drive RTL execution from spec to handoff. You’ll lead micro-architecture definition, ensure clean and efficient RTL, and collaborate across DV, PD, DFT, and architecture teams to deliver high-quality silicon. Job Description: Lead RTL design and...

  • Senior ASIC RTL Designer

    3 weeks ago

    Hyderabad, Telangana, India, Telangana Eximietas Design Full time

    Position: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...

  • Senior asic rtl designer

    4 weeks ago

    Hyderabad, India Eximietas Design Full time

    Position: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ years- Design and develop synthesizable RTL using Verilog/System Verilog for complex ASIC/So C blocks.- Create micro-architecture specs and ensure designs meet performance, power, and area targets.- Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and...

  • ASIC SOC RTL Design Lead

    2 weeks ago

    Hyderabad, India Eximietas Design Full time

    Hi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads ..!Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly...

  • Rtl design engineer

    1 week ago

    Hyderabad, India ACL Digital Full time

    Job Title: RTL Design Engineers Exp Level: 4+ yrsLoctaion: HyderabadJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• So C & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...