Senior Manager – ASIC Digital Design
2 weeks ago
- Senior Manager – ASIC Digital Design having 15 to 25yrs exp
- Experience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to silicon
- Experience of silicon bring and debug of aforesaid IPs
- Experience of leading and guiding a team of digital designers and collaborating with verification and physical design engineers
- Strong fundamental knowledge for Verilog and scripting languages, timing closure, DFT, Synthesis, Lint & CDC
- Strong knowledge of Asynchronous domain transfer schemes, cores, APB/JTAG
- Working knowledge of RTL2GDS flows
- Experience of working with Analog team for Mixed signal data paths
- Experience in leading R&D and future technology development projects.
- The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams.
- Team leadership experience, including planning and managing tasks is desirable
- M.S./MTech, BS/BE (Electronics)
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Senior Manager – ASIC Digital Design
2 weeks ago
Bangalore Urban, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs exp Experience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to silicon Experience of silicon bring and debug of aforesaid IPs Experience of leading and guiding a team of digital designers and collaborating with...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs expExperience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs exp Experience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to silicon Experience of silicon bring and debug of aforesaid IPs Experience of leading and guiding a team of digital designers and collaborating with...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs expExperience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification...
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RTL Integration Engineer for Digital ASIC Design
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Senior ASIC Design Verification Engineer
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Asic rtl design
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ASIC RTL design
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ASIC Design Engineer
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ASIC Design Engineer
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ASIC Design Engineer
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ASIC Design Engineer
1 month ago
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ASIC Design Engineer
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ASIC SOC RTL Design
1 month ago
bangalore, India Wipro Full timeWipro Hiring Senior ASIC/SoC RTL Lead/Manager with 4-18 Yrs of Experience!ℹ️ About the Role:- Require expertise in SoC subsystem/IP design- Must have in-depth knowledge of RTL quality checks (Lint, CDC)- Good understanding of AMBA bus protocols is essential- Knowledge in interface protocols like PCIe, DDR, Ethernet, and more is a plus- Proficiency in...
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ASIC SOC RTL Design
2 months ago
Bangalore, India Wipro Full timeWipro Hiring Senior ASIC/SoC RTL Lead/Manager with 4-18 Yrs of Experience! ℹ️ About the Role: - Require expertise in SoC subsystem/IP design - Must have in-depth knowledge of RTL quality checks (Lint, CDC)- Good understanding of AMBA bus protocols is essential - Knowledge in interface protocols like PCIe, DDR, Ethernet, and more is a plus - Proficiency...
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Asic soc rtl design
2 months ago
Bangalore, India Wipro Full timeWipro Hiring Senior ASIC/So C RTL Lead/Manager with 4-18 Yrs of Experience! ℹ️ About the Role: - Require expertise in So C subsystem/IP design - Must have in-depth knowledge of RTL quality checks (Lint, CDC)- Good understanding of AMBA bus protocols is essential - Knowledge in interface protocols like PCIe, DDR, Ethernet, and more is a plus - Proficiency...
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Senior ASIC/IP/SOC Design Verification Engineer
1 month ago
Bangalore Urban, India MosChip® Full timeCompany Description:MosChip® Technologies is a publicly traded company specializing in SILICON | PRODUCT | AI/ML Engineering solutions, with 1250+ engineers in Silicon Valley-USA and India. MosChip® offers end-to-end silicon design, verification, systems, software, and device engineering services, including multimedia, mobility, connectivity, AI/ML...
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bangalore, India ACL Digital Full time• Bachelor's degree in Science, Engineering, or related field.• 7+ years ASIC design, verification, or related work experience.• At least 5 years of experience with the ISO 26262 / IEC 61508 standard including hands-on experience with Failure Modes and Effect Analysis (FMEA), Fault Tree Analysis (FTA) and Failure Modes Effect and Diagnostic Analysis...
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Wipro | ASIC RTL design
2 days ago
bangalore, India Wipro Full timeSeeking a skilled RTL Design Lead/Manager (ASIC) :- 6-28 years experience in VLSI RTL IP/Subsystem design- Expertise in SoC Clock, Power IP/Subsystem, BUS/Subsystem, and moreProfound grasp of Digital design principles, especially AMBA SoC BUS protocols like APB, AXI, and AHB.Crafting micro-architecture and detailed design docs for SoC Subsystem, focusing...