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Senior Engineer-ASIC Design
1 month ago
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Our vision is to transform how the world usesinformation to enrich life for all.
We are a world leader in innovating memory and storagesolutions that accelerate the transformation of information intointelligence inspiring the world to learn communicate and advancefaster than ever.
Yourresponsibilities will include but are not limited to thefollowing:
This role is fora core technical individual contributor responsible for developmentof IPs and subsytem integration for controllers. You will beresponsible to analyses design requirements architecturespecification and come up with microarchitecture and designspecification. You will be responsible for design development bringup design using own methods of verification (Formal or Unittestbench). In daytoday work need to interact with DV for smooth IPdevelopment. You need to work on FW flow initialization sequencefor IP bring up. This Role requires knowledge and experience inworking with systems based on PCIe/NVMe/AXI/DDR etc. The positionwill require hands on experience in RTL logic coding simulation anddebugging. This is a highly visible and challenging role with lotof learning and future growth.
Strong fundamental knowledge of digital design Verilog andscripting language
Experience withmicroarchitecture and synchronous and Asynchronous digitaldesigns
Working experience of Synthesis STA Lint& CDC
Excellent problemsolvingskills.
Team player with great interpersonalcommunication skills.
Ability to work with localand remote teams Design/Verification
This roleis based out of Bangalore location.
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Senior Engineer-ASIC Design
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sany, India ConnectPro Consultant Full timeSenior EngineerASIC Design Our vision is to transform how the world usesinformation to enrich life for all. We are a world leader in innovating memory and storagesolutions that accelerate the transformation of information intointelligence inspiring the world to learn communicate and advancefaster than ever. Yourresponsibilities will include but...
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Design Verification Engineer
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Sany, India GLOBALTALEX PRIVATE LIMITED Full timeJob Role: Validated handson experience with IP & SOC RTLdesign. Experience with microarchitectureAsynchronous digital designs & ASIC RTL integration.Strong fundamental knowledge of digital design Verilogsystem Verilog and scripting languages Deepknowledge of IP and SoC design flows and methodologies (Lint CDCSynthesis/STA Power) Excellent...
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Sany, India GLOBALTALEX PRIVATE LIMITED Full timeJob Role: Validated handson experience with IP & SOC RTLdesign. Experience with microarchitectureAsynchronous digital designs & ASIC RTL integration.Strong fundamental knowledge of digital design Verilogsystem Verilog and scripting languages Deepknowledge of IP and SoC design flows and methodologies (Lint CDCSynthesis/STA Power) Excellent...
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Senior CAE Engineer
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