Staff RTL Design Engineer

Alternate Job Titles:

• Senior Digital Design Engineer
• ASIC Design Engineer
• High-Speed SerDes Design Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understanding of USB, PCIe, Ethernet, Display, and HDMI protocol standards, and you thrive in a collaborative environment. Your expertise in Verilog RTL design, microarchitecture, and timing constraints development makes you a valuable asset to any team. You are adept at using tools like Spyglass for CDC/RDC/Lint and have excellent debugging skills. Your ability to propose and implement design updates based on various requirements, coupled with your experience in test coverage and physical design timing closure, sets you apart as a leader in your field. With a passion for innovation and a keen eye for detail, you are ready to take on new challenges and contribute to the success of Synopsys.

What You'll Be Doing:

• Driving and working on digital design for high-speed serial interface PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards.
• Proposing micro-architecture of design/design updates based on customer requirements, analog requirements, system performance improvements, Link layer interface changes, or overall robustness of design.
• Implementing RTL in Verilog and running Spyglass CDC/RDC/Lint.
• Collaborating with verification teams to test desired functionality and corner cases.
• Developing timing constraints, DFT insertion, and test coverage, and closing timing with physical design teams.
• Well versed in Micro-Architecture and Block Ownership, Design from scratch.

The Impact You Will Have:

• Enhancing the performance and reliability of high-speed serial interface PHY IPs.
• Contributing to the development of cutting-edge technologies that power modern electronics.
• Driving innovation in digital design and influencing the future of semiconductor technology.
• Collaborating with cross-functional teams to deliver robust and high-quality designs.
• Ensuring that Synopsys remains a leader in the semiconductor industry through continuous improvement and excellence.
• Supporting customers by providing high-performance and reliable IP solutions that meet their needs.

What You'll Need:

• 5-8 years of relevant experience in digital design for ASICs.
• Strong knowledge of Verilog RTL design and microarchitecture.
• Experience with timing constraints development and synthesis flow.
• Proficiency in using Spyglass or similar tools for Lint/CDC/RDC.
• Proficiency in scripting and automation using TCL, PERL, or Python.
• Excellent debugging skills and attention to detail.

Who You Are:

• A collaborative team player with strong communication skills.
• A problem solver with a proactive approach to challenges.
• A detail-oriented professional with a passion for innovation.
• A self-motivated individual who thrives in a fast-paced environment.
• An adaptable engineer who can handle multiple tasks and priorities.

The Team You'll Be A Part Of:

You will be part of the High-Speed SerDes Digital Design Team, a group of talented engineers dedicated to developing high-performance serial link PHY IPs. The team focuses on innovation, quality, and collaboration to deliver industry-leading solutions. Together, you will work on challenging projects that push the boundaries of technology and make a significant impact on the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.