ASIC Engineer Design

5 days ago


Bengaluru, Karnataka, India Meta Full time ₹ 15,00,000 - ₹ 25,00,000 per year
The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing with capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains.

Responsibilities
Micro-architecture development Support RTL development using Verilog, System Verilog and HLS Soft and hard IP identification, selection and integration Collaboration with verification and emulation teams in test plan development and debug Collaboration with implementation team to close the design on timing and power

Qualifications
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 2+ years of silicon development experience Experience with Verilog or System Verilog Experience either Micro-architecture or RTL development for complex control or data path IPs, or Experience in SoC Micro-architecture, Design and Integration, or Implementation, Power methodology development RTL coding experience uArch experience EDA front end tools experince

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