Asic Rtl Design Engineer
1 day ago
Company Description
IDIOM SEMICON PVT. LTD. specializes in ASIC design and verification, with a strong commitment to grooming new college graduates to meet industry standards. The company is actively involved in IPs and VIPs development, enabling innovation and customization in semiconductor solutions. With a focus on sub-system ownership, IDIOM SEMICON delivers comprehensive and high-quality solutions to its clients. The team fosters a collaborative and knowledge-driven environment to advance the field of semiconductor design.
Role Description
This is a full-time, on-site role for an ASIC RTL Design Engineer based in Bengaluru South. The engineer will be responsible for designing, developing, and verifying RTL code for ASIC projects. Day-to-day activities will include working on IP and subsystem design, collaboration with cross-functional teams, simulation, debugging, and implementing design optimizations. The role may also involve providing technical guidance to new graduates and ensuring the designs meet functional and performance requirements.
Qualifications
- Proficiency in RTL design, including Verilog and VHDL
- Experience with simulation, debugging, and verification tools such as SystemVerilog, UVM, or similar technologies
- Knowledge of ASIC design methodologies and EDA tools
- Skills in IP or sub-system design and integration
- Problem-solving abilities and attention to detail
- Strong communication and collaboration skills
- Bachelor's or Master's degree in Electrical Engineering, Electronics, Computer Engineering, or a related field
- Prior experience in a related field or internships in semiconductor design is a plus
-
ASIC SOC RTL Design Lead
3 weeks ago
Bengaluru, India Eximietas Design Full timeHi All, Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. We are Hiring: ASIC SOC RTL Design Leads/Architect. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or...
-
Asic soc rtl design lead
2 weeks ago
Bengaluru, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1 B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
-
Asic soc rtl design lead
2 weeks ago
Bengaluru, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1 B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
-
ASIC RTL Engineer
1 day ago
Ahmedabad, Bengaluru, Chennai, India Krazy Mantra HR Solutions Pvt. Ltd Full time ₹ 18,00,000 - ₹ 30,00,000 per yearWe are looking for a skilled ASIC RTL Engineer with 5-9 years of experience to join our team in Bengaluru, Hyderabad, Chennai, Pune, Kochi, and Ahmedabad. The ideal candidate will have expertise in IP RTL design targeted for SOC, Static checks, some basic protocols, Low power, Micro Architecture, SoC subsystem/IP design, interface protocols, and scripting...
-
ASIC SOC RTL Design Architect
3 weeks ago
Bengaluru, India Eximietas Design Full timeHi All, Eximietas Design Hiring Senior RTL Design (Micro-architecture ) Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. ❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics. ❖ Engineering 10+ years of...
-
ASIC RTL Design Engineer
4 weeks ago
Bengaluru, India eInfochips (An Arrow Company) Full time😊Greetings of the day😊!!! This is regarding a Job opportunity with eInfochips as we are having a position of ASIC RTL DESIGN ENGINEERS Experience- 5+ Years Location- Bangalore, Ahmedabad Job Description: - Experience in RTL design - Verilog/VHDL - Simulation tools, Modeslim/VCS etc. - Basic protocols, I2C, UART, PCIe, SPI etc. - Micro-Architecture...
-
ASIC RTL Design Engineer
2 weeks ago
Bengaluru, India ACL Digital Full timeASIC RTL Design Engineer Location : Bangalore Job Description: Skills & Experience: • 3-5 years of experience in ASIC front end design and quality check. • Strong fundamental knowledge of digital design, Verilog, and scripting language. • Experience in multiple clock and voltage domain design. • Working knowledge for FE flows like Lint, CDC,...
-
Asic Rtl Design Engineer
4 days ago
Bengaluru, India Whatjobs IN C2 Full timeASIC RTL Design Engineer Location : Bangalore Job Description: Skills & Experience: - 3-5 years of experience in ASIC front end design and quality check. - Strong fundamental knowledge of digital design, Verilog, and scripting language. - Experience in multiple clock and voltage domain design. - Working knowledge for FE flows like Lint, CDC, synthesis, and...
-
ASIC RTL Design Engineer
2 weeks ago
Bengaluru, India ACL Digital Full timeASIC RTL Design Engineer Location : Bangalore Job Description: Skills & Experience: • 3-5 years of experience in ASIC front end design and quality check. • Strong fundamental knowledge of digital design, Verilog, and scripting language. • Experience in multiple clock and voltage domain design. • Working knowledge for FE flows like Lint, CDC,...
-
ASIC RTL Design Engineer
1 week ago
Bengaluru, Karnataka, India Proxelera Full time ₹ 12,00,000 - ₹ 36,00,000 per yearJob Description:Own RTL design of SoC-level or large subsystems from specification to silicon bring-up.Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog.Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs.Drive block/subsystem integration...
