
Memory Controller
2 weeks ago
Memory Controller - Staff Verification EngineersLocation : HyderabadFounded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. Memory Controller - Staff Verification Engineers: looking for experienced and talented professional for DDR Memory Controller Verification.
Minimum Qualifications:BE/BTech in Electrical/Computer engineering with 6-8+ years of experience Should have hands on experience in System Verilog, UVM/OVM and Object-Oriented ProgrammingProven track record in DDR5/LPDDR5X/LPDDR6/HBM4 IP verification from environment and tests development to validation closure
Work closely with RTL designers and SOC team to scope out integration and verification requirements
Proficiency in bus protocols AXI/AHBIntegration and verification of complex System IP features.Proficiency in scripting languages like Perl, Python etc.Strong communication, collaboration, and interpersonal skills
Strong analytical and problem-solving skills Preferred Qualifications:Experience in Memory controller, DDR4/5, LPDDR4/5, HBM memory protocols
Knowledge of Fabric/Network on chips, Cache CoherencyExperience in GLS is added advantage.Contact:UdayMulya ***************"Mining The Knowledge Community"
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Memory Controller
2 weeks ago
India Mulya Technologies Full time ₹ 15,00,000 - ₹ 20,00,000 per yearMemory Controller - PrincipalLocation: HyderabadFounded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. Memory Controller - Principal / Senior Staff Verification...
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Memory Layout Engineer
4 days ago
india ACL Digital Full timeExperience :3 to 8 years Location :Hyderabad/NoidaRole and Responsibilities: Responsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
2 weeks ago
India ACL Digital Full timeExperience :3 to 8 yearsLocation :Hyderabad/NoidaRole and Responsibilities:Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup, quality...
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Memory Validation Lead
1 week ago
India beBeeEnablement Full time US$ 1,22,500 - US$ 1,95,200Job OverviewWe are seeking a highly skilled professional to lead the enablement and validation of DDR memory technologies.Develop functional validation plans for DDR controller features, ensuring alignment with cross-functional teams.Drive debug in post-silicon, root-cause problems, and steer the team towards corrective actions.Collaborate with...
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DDR Memory Enablement/ Validation Lead
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Senior Engineer
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India Broadcom Full timeRole Lead and Execute Layout Design of SRAM CAM RF compiler memories in 5 3 2 FF technology Responsibilities Development of key building blocks of memory architecture such as Row Decoder IO Control Skilled in pitched layout concepts floor planning for Placement Power and Global Routing Knowledge of EM IR requirements Compiler level integration ...
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Staff Engineer
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India Xilinx Full timeJob Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded....