Senior SOC Design Engineer
2 weeks ago
- Architecture & Micro-ArchitectureDefine product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip
- Collaborate with software to co-optimize hardware features for AI workloads
- Collaborate with RTL designers to identify and complex technical issues/risks
- Review and guide RTL implementation, ensuring consistency with architectural intent and timing/power goals Collaborate with Physical-design teams for Area/Floorplan refinment, Timing targets etc
- Define and document interface specifications, control/status logic, and pipeline structures
- Lead PPA analysis and trade-off discussions across RTL and architecture
- Modelling & AnalysisDevelop and maintain high-level architecture and performance models
- Use simulation and architectural models to guide RTL-level improvements
- Validate model predictions against RTL or emulation results and refine accordingly
Necessary Qualifications:
- Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field
- 9+ years of experience in SOC design, SOC architecture, RTL design, micro-architecture
- Strong understanding of computer architecture, memory hierarchies, SoC interconnects, and AI/ML compute architectures
- Proven experience optimizing for performance, power, and area
- Hands-on expertise in Verilog/SystemVerilog, C/C++, and scripting (Python/Tcl/Perl) Preferred Qualifications: Experience with AI accelerators, DSPs, or high-performance CPUs/GPUs
- Familiarity with performance modeling frameworks (eg, Python/C++ based)
- Exposure to EDA tools, power/performance analysis, and hardware-software co-design
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