FPGA Development Engineer

3 days ago


Bengaluru, Karnataka, India Zigsaw Full time ₹ 2,40,000 - ₹ 3,60,000 per year

Position: FPGA Development Engineer/ FPGA Design

Experience: 10+ years

Salary: 20L to 30L

Location: Bangalore

About the Role:

We are looking for a highly skilled FPGA Development Engineer to join our R&D team in Bangalore. The ideal candidate will have deep expertise in signal processing, digital filter design, and high-speed digital interfaces, with proven experience in integrating FPGA-based systems with RF SoCs and developing IP cores for Ethernet and JESD204B protocols.

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Key Responsibilities:


•Design, implement, and verify FPGA modules for high-speed data acquisition and processing.


•Develop and integrate IFFT/FFT blocks and digital filters for signal processing applications.


•Implement JESD204B interfaces for high-speed connectivity with RF transceivers or SoCs.


•Develop and integrate high-speed Ethernet IP cores (10G/25G/40G) within FPGA-based systems.


•Perform RTL design using Verilog or VHDL, including synthesis, simulation, timing closure, and lab bring-up.


•Collaborate with system architects, RF engineers, and software developers to define specifications and system interfaces.


•Support design verification using ModelSim, Vivado, or other industry-standard tools.


•Perform board-level bring-up and debug using lab equipment like oscilloscopes, logic analyzers, and protocol analyzers.

________________________________________

Required Skills and Qualifications:


•Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering.


•5–10 years of experience in FPGA development and digital design.


•Strong background in signal processing, including IFFT/FFT, digital filters, and DSP algorithms.


•Experience with JESD204B interface design and debugging.


•Experience with high-speed Ethernet IP cores (10G/25G/40G preferred).


•Hands-on experience with FPGA design tools: Vivado, Quartus, ModelSim, Synplify, etc.


•Good understanding of timing analysis, clock domain crossing, and resource optimization.


•Familiarity with Xilinx or Intel (Altera) FPGAs.


•Strong problem-solving skills and attention to detail.

________________________________________

Preferred Qualifications:


•Exposure to RF SoC integration and high-speed analog-digital interfaces.


•Experience with scripting languages (TCL, Python) for automation.


•Prior experience in communications, radar, wireless systems, or defense electronics domains.


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