Analog Layout Design Engineer
5 days ago
Position: Analog Layout Design Engineer (SI510FF RM 3682)
Required Qualifications:
5 to 10 years of experience in analog layout design.
Proven experience in advanced nodes (7nm, 5nm, or below) is a must.
Proficiency in layout tools such as Cadence Virtuoso, ICV, Calibre, Assura, etc.
Strong understanding of analog layout constraints and techniques for high-performance and low-noise designs.
Preferred Skills:
Experience in high-speed IO layout (e.g., SerDes, DDR, PCIe).
Exposure to MBCFET and FinFET layout challenges and solutions.
Understanding of ESD and latch-up prevention techniques.
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Job Category: Others
Job Type: Full Time
Job Location: Bangalore
Experience: years
Notice period: 0-15 days
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