SOC Physical design Professional

1 day ago

Bengaluru Hyderabad Noida, India IDESLABS PRIVATE LIMITED Full time ₹ 8,00,000 - ₹ 15,00,000 per year
  • Location: Bangalore, Hyderabad, Noida, and Coimbatore.
  • Skills:
  • Soc level floorplanning, partitioning, timing budget generations, power planning, SOC PnR, CTS, block integration
  • Handling timing closure of high frequency blocks.
  • Expertise in signoff closure Timing with SI and OCV, Power, IR and physical verification at both block and chip level.
  • Understanding constraints and fixing techniques.
  • Experience in physical verification
  • Understanding SI prevention, fixing methodology and implementation.
  • Proficient in Synopsys ICC or Cadence or Mentor Olympus and Atoptech tool set.
  • Experience in Design Automation and UNIX system.
  • Experience in Tcl/ PERL is a plus.

Primary Skills:

  • Able to handle Soc PNR activities , SOC timing closure and SOC physical verification

Secondary Skills:

  • Able to handle SOC Synthesis, SOC IR drop, SOC Lec, SOC CLP

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