Director Silicon Design

1 week ago

Bengaluru, Karnataka, India Intel Full time ₹ 12,00,000 - ₹ 30,00,000 per year

Job Details:

Job Description:

  • Directs and manages a team of physical design engineers responsible for the physical design implementation of a chip design, subsystem, or block including clocking, timing, and integration
  • Provides guidance on physical design implementation and analyzes layout designs, power delivery, place, route, clock tree synthesis, and other aspects of physical design
  • Manages development of complex layout integrated circuit designs, simulation designs, RTL to GDS, logic synthesis, and oversees documentation for SoC development
  • Reviews circuit layouts architectures and prototypes, ensures issue resolution, and optimizes circuit output
  • Oversees physical design verification flow at block and chip level and makes recommendations to fix violations for current and future product architecture
  • Ensures schedule and landing zone requirements of the block, subsystem, or SoC are met
  • Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results
  • Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.

*Qualifications:*

  • Btech/Mtech with 15+ years of experience with complex ASIC/SOC Implementation.

  • Experience in leading team of engineers.

  • Solid understanding of system and processor architecture, and the interaction of computer hardware with software.
  • Experience designing and implementing complex blocks like CPUs, GPU , and Media blocks and Memory controller
  • Experience with System Verilog/SOC development environment
  • Strong background in scripting - PERL,TCL, Phyton
  • Understanding of Hardware validation techniques.
  • Knowledge of Industry standard protocols - PCIE, USB, DRR, etc, preferable
  • Experience with Low power/UPF implementation/verification techniques preferable.
  • Experience with Formal verification techniques is preferable.

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