 
						RFIC Layout Engineer
5 days ago
RFIC/MMIC Layout Engineer
Roles And Responsibilities
- Responsible for design, planning, scheduling and execution of Full Chip development with analog and digital components.
- Perform Full chip feasibility and die size estimation in core limited and pad limited approach for different bonding schemes.
- Expertise with top to bottom and bottom to top approach floorplan, power schemes, Interface signal planning and routing, physical verification and quality check.
- Make sure to deliver quality full chip layout on-schedule meeting design intent - Speed, Capacitance, Resistance, Power, Noise and Area.
- Works on complex issues and exercises judgement in selecting methods for obtaining results.
- Builds strong business relationships with cross-functional teams for smoother execution of projects.
- Work closely with Synaptic Global Analog and Digital Design and CAD engineering teams.
Basic Qualifications
- Bachelor's degree in electrical engineering, Electronics, Physics, or related field.
- Experience with RF and MMIC design – with expertise gained in at-least one or more areas: -RF switches, power amplifiers, LNA, VCO, mixers, couplers, combiners layout.
Preferred Skills And Experience
- Good understanding of active and passive devices, circuits and electrical fundamentals.
- Expert of CMOS, FDSOI and FinFET fabrication concepts, Deep Nwell and triple well process.
- Expert of analog layout techniques, electromigration, ESD, latch up, crosstalk, shielding and deep sub-micron challenges.
- Expertise with SOC and ASIC design flows, procedures and deliverables.
- Hands-on experience with Virtuoso L/XL/GXL (6.1.x and 12.1.x), Calibre, PERC, STARRC, Totem and ESRA tools.
- Strong analytical, debug and problem-solving skills in resolving layout design challenges and physical verification issues.
- Flexible to work in a cross functional and multi-site team environment, spanning different time zones.
- Must have good verbal and written communication skills.
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