RTL IP Design Engineer
7 days ago
Overview:
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
Together, we advance your career.
Responsibilities:
RTL IP Design Engineer
THE ROLE:
As a member of the Networking Technology Solutions Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
This exciting position as MTS will provide the opportunity to demonstrate strong technical collaboration across the design hierarchy from architecture to productization. Join us in providing innovative IP solutions as we embark on our journey into delivering the leading-edge IP Solutions for data center networking solutions
THE PERSON:
You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.
KEY RESPONSIBILITIES:
- Define product features and micro-architecture requirements. Create technical specifications for IP blocks to meet those requirements, and provide technical guidance to design teams
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop solutions to achieve product requirements
Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation
- Knowledge sharing and other contributions to Platform & System Architecture
- Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets and sign offs
- Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
PREFERRED EXPERIENCE:
- A minimum of 10 years of experience is required
- Proven experience in Silicon IP development process and design methodologies
- Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..
- Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols
- Detailed knowledge of PCIe is a plus
- Excellent communication and presentation skills
- Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Qualifications:
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
-
RTL Design Engineer
1 week ago
Hyderabad, Telangana, India, Telangana ACL Digital Full timePosition: RTL Design EngineerExperience: 5 - 8 YearsQualifications: BE/Btech in ECE/EEEResponsibilities -The candidate should have strong RTL design experience.Strong design experience in Ethernet IPs or Ethernet protocol domain.Knowledge in Verilog/VHDL languagesScripting languages: TCL/Perl/Python (any one).Knowledge of AXI Protocols.
-
RTL Design Engineer
1 week ago
Hyderabad, Telangana, India, Telangana ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 4+ yrsLoctaion: Hyderabad /BangaloreJob Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...
-
RTL Design Engineer
1 week ago
Hyderabad, Telangana, India, Telangana ACL Digital Full timeJob Title: RTL Design EngineersExp Level: 4+ yrsLoctaion: Hyderabad Job Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...
-
ASIC RTL Engineer
23 hours ago
Hyderabad, Telangana, India Talent Worx Full time ₹ 15,00,000 - ₹ 25,00,000 per yearRTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any OneI2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any OneScripting languages like Make flow, Perl ,shell, python - Any OneASIC RTL EngineerExpertise in SoC subsystem/IP designExpertise in IP design,...
-
FPGA RTL Design Engineer
1 week ago
Hyderabad, Telangana, India, Telangana Centaurus Technologies and Systems Private Limited Full timeJob SummaryWe are seeking a talented FPGA RTL Design Engineer to design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You’ll work closely with system...
-
RTL Design Engineer
1 week ago
Hyderabad, Telangana, India, Telangana ACL Digital Full timeCandidate should be with strong RTL design experience.Strong design Experience in Ethernet IPs or Ethernet protocol domain.knowledge in Verilog/VHDL languagesscripting languages TCL/Perl/python any one.Knowledge of AXI Protocols.Location Bangalore & Hyderabad
-
RTL Design Engineer
7 days ago
Hyderabad, Telangana, India ACL Digital Full time ₹ 4,00,000 - ₹ 12,00,000 per yearRTL Design EngineerSkill: ASIC RTL Design with LINT, CDC. Experience: 1 to 3 Years Notice Period: Immediate to 15 days Share your updated resume now.
-
Manager – IP Design
1 week ago
Hyderabad, Telangana, India, Telangana Connectpro Management Consultants Private Limited Full timeBSEE/ MSEE under Electronics or Electronics/ Telecommunications Engineering department15+ years relevant digital IP/SoC Design experienceRequired SkillsProficiency in RTL design skills with Verilog, VHDL and System Verilog hardware coding languagesDeep understanding of digital design principles, synthesis, timing analysis, and verification...
-
Senior RTL Design Engineer
2 weeks ago
Hyderabad, Telangana, India AMD Full time ₹ 12,00,000 - ₹ 36,00,000 per yearOverview:WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded....
-
Senior RTL Design Engineer
1 week ago
Hyderabad, Telangana, India Wisig Networks Full time ₹ 15,00,000 - ₹ 25,00,000 per year7+years of experience in RTL design and verification.Proven experience with digital logic design using Verilog, VHDL, or System Verilog.Experience with simulation tools such as VCS, QuestaSim, or similar.Hands-on experience with RTL design tools (e.g., Synopsys Design Compiler, Cadence Genus).Develop RTL code based on system-level specifications using...