SoC Design Verification Engineer

Job Details:Job Description: 
• Architecture, development and integration of layered Verification IPs, UVM/SV testbenches, test plans and test suite to validate the integrity and quality of VIPs, compliance with standards and SoC architecture and micro-architecture requirements. Applies pre-silicon validation BKMs and methodologies in execution. Work with VIP external vendors to resolve issues within the constraints of the contract.
• Deliver validated VIP based SoC validation platform, modeling the SoC, for die level verification. Provides prompt and quality customer support to users.
• Perform functional logic verification of an integrated SoC to ensure design will meet specifications.
• Defines and develops scalable and reusable components, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and conform to microarchitecture specifications.
• Manage and execute verification plans and defines and runs system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, verification experts, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Document verification architecture, micro-architecture, and test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products.
• Demonstrate technical leadership, lead engineering team and provide status updates to leadership.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:
• Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience.
• Related technical experience should be in/with: Pre Silicon Validation/Verification using Industry standard verification methodologies, tools, and BKMs to meet time-to-market.Preferred Qualifications:
• Design Verification with planning, architecture, development, maintenance, and execution on complex IPs and/or SOCs.
• Proficiency in UVM/SV constrained-random coverage based design verification.
• UVM/SV Verification IP architecture, development and validation experience.
• Robust understanding of fundamental principles of cache coherency in multi-processor SOCs, and experience with layered protocols - transaction layer, data link layer, and PHY layer.
• Experience with one or more scripting languages to facilitate automation.
• Strong debug skills and self-reliance in taking an issue to closure with internal and external partners. Takes ownership of assigned tasks.
• Keen problem solver, strong communicator, quick learner, effective team player and open to learning and teaching new and more efficient validation execution techniques to meet time-to-market.
• The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure).
• Developing validation testbenches and test suites and driving continuous improvement into existing validation test suites and methodologies.
• Experience in Xeon CPU Pre-Silicon or Post Silicon ValidationRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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