DV Engineer

We are looking for a Manager – Digital Design with strong experience in RTL design and Design Verification (DV) . The ideal candidate will be a techno-functional manager , actively engaged in design/verification activities, while also managing a mid-to-large engineering team (~30 members). The role involves close coordination with multiple projects,...

We are looking for a Manager – Digital Design with strong experience in RTL design and Design Verification (DV). The ideal candidate will be a techno-functional manager, actively engaged in design/verification activities, while also managing a mid-to-large engineering team (~30 members). The role involves close coordination with multiple projects, ensuring...

We are looking for a Manager – Digital Design with strong experience in RTL design and Design Verification (DV). The ideal candidate will be a techno-functional manager, actively engaged in design/verification activities, while also managing a mid-to-large engineering team (~30 members). The role involves close coordination with multiple projects, ensuring...

Job DescriptionJob descriptionThe position involves design verification of next generation modem sub systems (which has MAC, Baseband and RF IP s involved for latest Wi-Fi protocol including 11ax) with emphasis on verifying and signing off performance and power along with functionality. This role will require the candidate to understand and work on all...

Job Role SummaryWe are seeking a talented and skilled professional to fill the role of Power Simulation Engineer.Job DescriptionThe ideal candidate will have experience in power domains, HW programming guide sequences, and low power design techniques. The responsibilities will include understanding of power domains and HW programming guide sequences, develop...

About the jobJob Location: Bangalore/ HyderabadNotice Period: 15 days to 30 DaysMinimum: 4 YearsKey Responsibilities:- Developing test plans- Coding and bring up of asm, c++ tests- UVM test bench components coding and maintaining- Debugging regression fails- Protocol: DDR,PCIE,USB,MIPI, PCIEPreferred Experience:Should have worked on Processor based System or...

About the job Job Location: Bangalore/ Hyderabad Notice Period: 15 days to 30 Days Minimum: 4 Years Key Responsibilities: Developing test plans Coding and bring up of asm, c++ tests UVM test bench components coding and maintaining Debugging regression fails Protocol: DDR,PCIE,USB,MIPI, PCIE Preferred Experience: Should have worked on Processor based...

About the jobJob Location: Bangalore/ HyderabadNotice Period: 15 days to 30 DaysMinimum: 4 YearsKey Responsibilities:Developing test plansCoding and bring up of asm, c++ testsUVM test bench components coding and maintainingDebugging regression failsProtocol: DDR,PCIE,USB,MIPI, PCIEPreferred Experience:Should have worked on Processor based System or...

About the job Job Location: Bangalore/ Hyderabad Notice Period: 15 days to 30 Days Minimum: 4 Years Key Responsibilities: Developing test plans Coding and bring up of asm, c++ tests UVM test bench components coding and maintaining Debugging regression fails Protocol: DDR,PCIE,USB,MIPI, PCIE Preferred Experience: Should have worked on Processor based...

Senior Principal Design Verification Engineer (India)/ Principal Design Verification EngineerBangalore (Hybrid ) / Hyderabad (Hybrid ) Company BackgroundWe are one among 49 US AI startups that have raised $100 M or more in 2024We are on a mission to revolutionize AI compute systems and infrastructure at scale through the development of superior-scaling...