Principal Engineer, Design Verification

3 days ago

Bengaluru, Karnataka, India Analog Devices Full time ₹ 1 - ₹ 3 per year

Must Have Skills

  • SystemVerilog and UVM Mastery: Recognized expert-level knowledge of SystemVerilog and Universal Verification Methodology for architecting sophisticated verification environments for the most complex designs
  • Verification Strategy and Architecture: Exceptional ability to develop comprehensive verification strategies that drive coverage-driven methodologies and verification closure across multiple product lines
  • Mixed-Signal Verification Expertise: Deep understanding of mixed-signal design principles and verification methodologies, with proven ability to implement innovative verification approaches for complex designs
  • Advanced Debugging Mastery: Superior debugging skills across multiple design abstractions, with demonstrated ability to solve the most complex verification challenges
  • Verification Methodology Innovation: Proven track record of developing and implementing new verification methodologies that advance the state of the art
  • Technical Leadership and Influence: Demonstrated ability to influence verification direction across the organization, mentor engineering teams, and drive methodology adoption through technical expertise
  • Strategic Problem Solving: Advanced analytical capabilities to identify and solve unusually significant verification challenges with high impact across product lines

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