Staff Design Verification Engineer

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at  and on LinkedIn and Twitter (X).

Staff Design Verification Engineer

The Engineering Enablement organization at ADI provides industry-leading tools, methodologies, and support to accelerate product development across the company. This position is part of the Systems Verification and Validation (SVV) group within the Engineering Enablement organization in the CTO Office. SVV is ADI's DV Center of Expertise, responsible for developing, deploying, and supporting comprehensive solutions as well as execution under its Verification eXcellence Program (VXP). SVV's expertise spans the entire DV landscape - Unified Metric-Driven Verification (MDV), SystemVerilog/UVM, Mixed-Signal DV, Formal Verification, Functional Safety, Security, Portable Stimulus, and Emulation/Prototyping technologies.

About the Role
As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs. You'll architect sophisticated verification solutions, mentor junior engineers, and collaborate across organizational boundaries to ensure product quality and reliability.
Working with limited direction, you'll apply your deep technical expertise to solve critical verification challenges while representing ADI in interactions with key customers and industry partners. This senior position involves significant influence on verification methodology adoption and technical decisions that impact crucial organizational objectives.

Key Responsibilities

• Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key contributor in critical verification environments
• Verification Architecture: Design and implement sophisticated UVM-based verification environments that ensure comprehensive test coverage and design quality
• Technical Mentorship: Guide and develop junior engineers, serving as a resource for colleagues with less experience while modeling professional behaviors
• Cross-Functional Direction: Coordinate work across organizational lines, collaborating with design teams on verification requirements and sign-off criteria
• Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal direction, developing resolutions that require in-depth analysis
• Coverage Closure: Drive functional and code coverage closure using advanced verification methodologies to ensure design accuracy
• Post-Silicon Support: Lead post-silicon validation activities, contributing expertise to address critical issues
• Customer Representation: Serve as principal customer contact on projects, representing ADI's technical excellence and customer commitment

Must Have Skills

• SystemVerilog and UVM Expertise: Expert-level knowledge of SystemVerilog and Universal Verification Methodology for architecting advanced verification environments for complex designs
• Test Planning and Strategy: Demonstrated ability to develop comprehensive verification plans that drive coverage-driven methodologies and verification closure
• Mixed-Signal Verification: Deep understanding of mixed-signal design principles and verification methodologies, with experience implementing sophisticated verification approaches
• Debugging Mastery: Advanced debugging skills across multiple design abstractions, with proven ability to resolve complex verification issues with minimal direction
• EDA Tool Proficiency: Extensive experience with electronic design automation tools (Cadence/Synopsys) and formal verification techniques
• Scripting and Automation: Advanced proficiency in Python, Perl, TCL, or Shell scripting for creating sophisticated verification automation frameworks
• Technical Leadership: Demonstrated ability to influence verification direction, mentor junior engineers, and drive methodology adoption across teams

Preferred Education and Experience

• MS/PhD in Electrical Engineering, Computer Engineering, or related field
• 7-10+ years of relevant digital design verification experience, with particular emphasis on mixed-signal verification

Why You'll Love Working Here
At Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.
Your expertise will shape the future of technology, and you'll be supported by a culture that values continuous advancement and professional growth. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.