Static Timing analysis Engineer

Who we are looking forLooking for seasoned static data professional who will work with FX DBM operations team to create accounts in system for clients to execute foreign exchange trade.Respond to e-mail inquiries accurately and in a timely manner. Escalate and report issues, including systems related issues to the appropriate groups, track and ensure...

Job Title: Verification EngineerJob Location: HyderabadExperience: 5 to 8 years Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, or VLSI Design or equivalentJob Description:we are seeking a Verification Engineer specializing in Static Timing Analysis (STA) and Standard Cell Characterization for advanced memory product development (HBM, DRAM). The role...

About the Role :We are seeking a talented Implementation Engineer to join our dynamic team. The successful candidate will be responsible for leading and executing Synthesis and STA for complex AI SOC with multi-mode and multi power domain design, ensuring the quality and reliability of our products. This is what you are responsible for :Synthesis and STA...

Role & responsibilitiesDoing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%)• Able to characterize basic STD Cells• Writing ARC for STD cell char (using primeLib , Silicon smart)• .lib QA check• Circuit understanding block wise , Full chip level• Static timing Analysis of DRAM block wise , top level analysis ,...

Job Description:We are looking for a qualified Structural Design Engineer with hands-on experience in the analysis and design of RCC structures for buildings and infrastructure projects.Key Responsibilities:Structural design and detailing of RCC elements including Beams, Columns, Slabs, Isolated Footings, Staircases, Wall Panels, and Rigid Zones using...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning(for hierarchical designs),placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks,...

ACL Digital hiring for below position𝗔𝗦𝗜𝗖 𝗗𝗲𝘀𝗶𝗴𝗻 𝗘𝗻𝗴𝗶𝗻𝗲𝗲𝗿𝗝𝗼𝗯 𝗗𝗲𝘀𝗰𝗿𝗶𝗽𝘁𝗶𝗼𝗻 Must have proven track record of ASIC design on several production tape-outs. Experience in Designing RTL block for an SOC. Experience in integrating ASIC IP into an SOC. Experience with Arm...

Job DescriptionASIC RTL Design EngineerJob Description:Exp: 5 to 8 yrsLocation: Hyderabad- Good knowledge on the digital concepts and ASIC flow- Experience in RTL coding is a must.- Must have hands on experience with SoC design and integration.- Experience in Verilog/System-Verilog is a must.- knowledge of AMBA protocols - AXI, AHB, APB- Basic knowledge on...

Role Description:This is a full-time on-site role for a Senior Lead Physical Design Engineer based in Hyderabad. The Senior Physical Design Engineer will be responsible for tasks related to physical design, physical verification, logic design, circuit design, and RTL design in the development of silicon products.Qualifications:He/She should be able to do...

Job PurposeDefines and leads engineering solutions within a SSE project taskforce, and acts as a technical and technological referent, in accordance with TechnipFMC standards, procedures and processes, schedules and man hours, with a continuous concern for quality, targets, and customer satisfaction.Review and interpret customer technical specifications and...