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Analog Design Engineer
2 weeks ago
Candidate should have
Strong understanding of Analog circuit design fundamentals covering
Noise
Mismatch
Linearity
Gain
Bandwidth
Stability
ADC Building block hands on experience
Sample-and-hold circuits
Comparators
Operational amplifiers
Bias and reference circuits
SAR logic (for SAR ADCs)
Clock/data timing circuits for pipeline or delta-sigma ADCs
Understanding of ADC architectures
SAR
Pipeline
Flash
Delta-sigma
Successive approximation
Simulation & Modelling
Expertise in SPICE-based simulators
Spectre
HSPICE
Eldo
Experience with
Monte Carlo
Corner analysis
Noise
Transient
AC simulations
Verilog-Analog or System Verilog based Behavioural modelling
Candidate may have the desirable skills
Design for low-power
low-noise
high-speed
ultra-low-area ADCs
mixed-signal design on clocking and digital interface
Digital calibration techniques
Lab bring-up, testing and debugging of silicon
Layout floorplanning and parasitic-aware design
Interested candidates may send resume in PDF format only, to