Physical Design Engineer

Company Description:MosChip Technologies is a publicly traded company specializing in Silicon and Product Engineering solutions with over 1300 engineers based in Silicon Valley, USA, and India. With expertise spanning end-to-end silicon design, verification, systems, software, and device engineering, MosChip offers comprehensive solutions including...

Job Requirements Job Title: Lead Physical Design EngineerWe are currently seeking a highly skilled Lead Physical Design Engineer to join our team on a temporary basis. As the Lead Physical Design Engineer, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex integrated circuits. Key...

Job Requirements Job Title: Lead Physical Design Engineer We are currently seeking a highly skilled Lead Physical Design Engineer to join our team on a temporary basis. As the Lead Physical Design Engineer, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex integrated circuits. Key...

Role Description:This is a full-time on-site role for a Senior Lead Physical Design Engineer based in Hyderabad. The Senior Physical Design Engineer will be responsible for tasks related to physical design, physical verification, logic design, circuit design, and RTL design in the development of silicon products.Qualifications:He/She should be able to do...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning(for hierarchical designs),placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks,...

Physical Design Engineer MosChip is growing, and we're on the lookout for passionate professionals to join our dynamic team in Hyderabad. Experience - 3 to 12 years Share your updated resume now.

Responsibilities:Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks.Worked on 65nm or lower node...

EMIR EngineersExperience : 3yearsLocation : HyderabadExperience in ASIC EMIR/PD flow and EDA tools experience such as Redhawk-SC , Redhawk – IR and EM Analysis toolAnalyze EMIR violations and provide implementation choices to Physical designScripting language experience: Python, perl, shell preferred.Strong verbal and written communication skillsKnowledge...

Key ResponsibilitiesLead block-level PNR activities from floorplanning through final routing, ensuring robust physical implementation aligned with timing, power, and area goals.Drive power grid design and EM/IR-aware routing strategies to ensure block-level power integrity and reliability.Collaborate closely with timing closure engineers to resolve physical...

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