SOC Dv

Job Requirements Job DescriptionResponsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan...

Role:Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV-IP with Ethernet/PCIENP: Immediate to 30 daysLoc: HYDExp: 10+ yrsRole:Design Verification EngineerSkill: DV with Soc, GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with...

Role: Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV-IP with Ethernet/PCIENP: Immediate to 30 daysLoc: HYDExp: 10+ yrsRole: Design Verification EngineerSkill: DV with Soc, GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with...

Role:Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

Role: Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

Role: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

LTTS is hiring for Design Verification Engineers with 5+ Years of experience. Job Location : Bangalore, IndiaDetailed JD is as below ::Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design...

Role: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

Role: Design Verification Engineer Skill: DV with Soc, Arm Processor NP: Immediate to 30 days Loc: BLR Exp: 6+ yrs

Position: SOC DV (SI58FT RM 3600)Job DescriptionShould have a good understanding of AMBA – AXI, AHB, APB protocols.Should be well versed with SystemVerilog.Basic C languageGood debug skillsBasic UVM*******************************************************************************************************************************************Job Category:...