SOC Dft Dv Requirement

2 weeks ago

Bengaluru, India Quess IT Staffing Full time

**About Us**

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**About Company**

**Roles and Responsibility**
- Job description

SOC DFT DV Requirement
**Exp
- **5 to 10 yrs

Location
- Bamgalore

Np
- 15days to Immediate

We have SOC DFT DV requirement open now with 5 positions with 5+ years only.

Open for both Hyderabad (Primary) and Bangalore (Secondary) locations. Please start sharing the profiles.

**Job Description**:
What are the responsibilities in this role
- Develop and execute pre-silicon verification test plans for DFT features of the chip. Develop directed and random verification tests to validate the functionality.
- Verify DFT design blocks and subsystems (such as MBIST, high speed IO PHY, fuse, clocks, reset) using complex SV or C++ verification environments. Construct SystemVerilog and/or C/C++ models and test sequence libraries for simulation.
- Debug regression test failures to expose specification and implementation issues. Identify and address areas of concern to meet design quality objectives.
- Post silicon ATE and System level debug support of the test patterns delivered. Optimize the test patterns to improve the test quality and reduce test costs.

What is the experience and knowledge you should have?
- 5 year experience in DFT feature verification (such as JTAG, MBIST, SCAN, fuse, IO-PHY loopback testing)
- Strong programming skills in Verilog and/or C++
- Strong debug skills and experience with debug tools such as Verdi.
- Experience with EDA simulation tools like Synopsys VCS, Cadence NCSIM, Verdi
- Experience with any scripting languages like Tcl/Perl/Ruby/Python
- Working knowledge of Unix/Linux OS, file version control.
- What educational background should have?
- Minimum Engineering Degree in Electronics/Electrical/Computer Science

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