Memory Layout Engg
6 days ago
Perform process or device design.
Typically performs one or more of the following in capacity of either an individual contributor (as directed and/or independently), or as a manager:
- Designs new or modifying product system or device to support technology, design enablement, and/or ecosystem and design solutions
- Provides custom design features and components, differentiated enablement tooling, and or support for client designs
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
- Work and collaborate on other projects and/or assignments as needed
**Title: MTS Design Engineering - Memory Layout Design**
**About GlobalFoundries**
**Introduction**:
**Your Job**:
- Circuit design, simulation, and characterization of full custom circuits
- Functional simulations and statistical analysis
- Sign off and release the memory IP’s on dedicated IP validation test chips
- Support Silicon bring-up and characterization
- Participate in implementation & design/layout reviews
- Contribute with innovative ideas for addressing design problems
- Work closely and collaborate with IP design and layout teams
**Required Qualifications**:
- Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 12-15 years of relevant experience
- Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.)
- Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs
- Experience in timing characterization, Verilog is desirable
- General analog mixed-signal design concepts is desirable
- Circuit design, Reliability analysis, Statistical analysis of circuits
- Must have good technical verbal and written communication skills and ability to work with cross functional teams
- Be able to collaborate with technical design leads on multiple concurrent projects.
**Preferred Qualifications**:
- Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable
- Hands on knowledge of state-of-the-art memory or analog design flows
- Programming experience applicable to design flow automation tasks
- Dedication and the capability to work within a very dynamic interdisciplinary environment
- Knowledge of 45/32/28nm and below technology nodes is an advantage.
- Ability to communicate as well as work efficiently in an international multi-disciplinary environment.
- Exceptional Spoken and Written Proficiency in English
- Strong analytical and problem-solving skills.
GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard.
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Bengaluru, India ACL Digital Full timeJob Title: Memory Layout EngineerExperience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory DesignJob Summary:We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...
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Bengaluru, India ACL Digital Full timeJob Title: Memory Layout Engineer Experience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory Design Job Summary: We are looking for a Memory Layout Engineer with strong expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs. The candidate will be responsible for...
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