Principal Design Verification Engineer

1 day ago


Bangalore, India Mulya Technologies Full time

Principal Design Verification Engineer: UCIE Focused Bangalore We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI. Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. Principal Design Verification Engineer: UCIE Focused In this role you will be working on high performance UCIe controllers at block and SoC level. The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level Partner with Architects and RTL Design team to grasp high-level system requirements and specifications. Develop the verification environment and reusable bus functional models, stimulus, checkers, assertions, trackers, and coverage metrics. Execute verification plans, including tasks such as design bring-up, setting up the DV environment, running regressions for feature validation, and debugging test failures. Bachelor’s or Master’s degree in Electrical/Electronics Engineering/Science with 10 to 18 years of relevant experience Must have strong expertise with SV/UVM methodology and/or C/C++ based verification with 5yrs+ hands-on experience in IP/sub-system and/or SoC level verification Hands on experience and expertise with industry standard verification tools for simulation and debug (Questa/VCS, Visualizer) Experience using random stimulus along with functional coverage and assertion-based verification methodologies a must. Experience in development of UVM based verification environments from scratch. Hands on expertise and protocol knowledge in any of: APB/AXI/CXS protocols , PCIe/CXL protocols, UCIE compliance testing. Mining The Knowledge Community"



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